From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9D384EB8FB7 for ; Wed, 6 Sep 2023 11:24:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=N1h+c5nX3j255hohi/9xTP4kClPpCgcQP6yZheX7CKI=; b=sUN5SucPt9JSQy pKP0FXRkTGJnWXlWw38sHMZrOZF6uLbEfDRQaGh5lfFsOUbJP+SYoQZ1ZgiRRYB7UN54J+u+rr9uR 2AuKMWG0b7pCEuH/GIwqijjmpqj0orzPj0h5l+veUKG01huMgm1dUyXhAXc15MblqMyQLxvkskgg0 Isx2tfw8ACtHODZuxKi3GtpdrNX1QbdOewkRI3PadviJQTZ8r60zrpEfDX8ZekGaCEwzRAsexqoog h7Qs6F/6a3d/4rCIbmdAQr3e293K9D/2mMOVycsdidV9KUtqXip5a9Z0XDNlJ/Kr32QM9MuaHucbl seabSbHs/F1sA3vkee2Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qdqdL-008gjX-1X; Wed, 06 Sep 2023 11:23:43 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qdqdH-008gei-2j for linux-arm-kernel@lists.infradead.org; Wed, 06 Sep 2023 11:23:41 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 30B7BCE13C2; Wed, 6 Sep 2023 11:23:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 74098C433C8; Wed, 6 Sep 2023 11:23:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1693999415; bh=NRdLoNKhI8PWwsTXFAHLBFbX98sCx24HY9qcuOQXDrM=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=J/cktlELZjjFahQnUXwth9JUwqt0zVB8hl4mjsD38asMKwfIO6h0ESe0N21OLwfql vrb9qQpj667aDi5/TR7UiZURX5jxJPBU+q4uC78G/1gU57abzufMBeMbzEClls9/ry lA6qeCiuhBL4KGSWa9f8HhZLEs0ls/XMUevagvIiPCu0yqmjWOomzQ1w4N0VdmFqa5 EdesLxbYag3193XemqEnlsqHEdDsJt8N+XyAx3LVwUUsko12huWHl25uJ6p0oxPbvr 0HRW3wbXSfX4yHzTTzPufTv7zV4sWm5PFYb+sAFrU6r/ge1o4xXhI3Bo2vGpr0El0z DQ7SGMsW8mwhA== Date: Wed, 6 Sep 2023 13:23:30 +0200 From: Lorenzo Pieralisi To: Marc Zyngier Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Mark Rutland , Robin Murphy , Rob Herring , Fang Xiang Subject: Re: [PATCH v2 0/2] irqchip/gic-v3: Enable non-coherent GIC designs probing Message-ID: References: <20230905104721.52199-1-lpieralisi@kernel.org> <20230906094139.16032-1-lpieralisi@kernel.org> <6f94c6d38f00031bf7c59e0cb8baf04c@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <6f94c6d38f00031bf7c59e0cb8baf04c@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230906_042340_079190_E82CC16C X-CRM114-Status: GOOD ( 24.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Sep 06, 2023 at 10:52:01AM +0100, Marc Zyngier wrote: > On 2023-09-06 10:41, Lorenzo Pieralisi wrote: > > This series is v2 of a previous version[1]. > > > > v1 -> v2: > > - Updated DT bindings as per feedback > > - Updated patch[2] to use GIC quirks infrastructure > > > > [1] > > https://lore.kernel.org/all/20230905104721.52199-1-lpieralisi@kernel.org > > > > Original cover letter > > --- > > The GICv3 architecture specifications provide a means for the > > system programmer to set the shareability and cacheability > > attributes the GIC components (redistributors and ITSes) use > > to drive memory transactions. > > > > Albeit the architecture give control over shareability/cacheability > > memory transactions attributes (and barriers), it is allowed to > > connect the GIC interconnect ports to non-coherent memory ports > > on the interconnect, basically tying off shareability/cacheability > > "wires" and de-facto making the redistributors and ITSes non-coherent > > memory observers. > > > > This series aims at starting a discussion over a possible solution > > to this problem, by adding to the GIC device tree bindings the > > standard dma-noncoherent property. The GIC driver uses the property > > to force the redistributors and ITSes shareability attributes to > > non-shareable, which consequently forces the driver to use CMOs > > on GIC memory tables. > > > > On ARM DT DMA is default non-coherent, so the GIC driver can't rely > > on the generic DT dma-coherent/non-coherent property management layer > > (of_dma_is_coherent()) which would default all GIC designs in the field > > as non-coherent; it has to rely on ad-hoc dma-noncoherent property > > handling. > > > > When a consistent approach is agreed upon for DT an equivalent binding > > will > > be put forward for ACPI based systems. > > What is the plan for this last point? I'd like to see at least > a proposal before taking this series in. Absolutely, I am starting a thread on related MADT changes, should not take too long. Lorenzo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel