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From: Oliver Upton <oliver.upton@linux.dev>
To: Raghavendra Rao Ananta <rananta@google.com>
Cc: Marc Zyngier <maz@kernel.org>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Shaoqin Huang <shahuang@redhat.com>,
	Jing Zhang <jingzhangos@google.com>,
	Reiji Watanabe <reijiw@google.com>,
	Colton Lewis <coltonlewis@google.com>,
	linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v5 08/12] KVM: arm64: PMU: Allow userspace to limit PMCR_EL0.N for the guest
Date: Fri, 15 Sep 2023 20:53:11 +0000	[thread overview]
Message-ID: <ZQTEN664F/5PzyId@linux.dev> (raw)
In-Reply-To: <20230817003029.3073210-9-rananta@google.com>

Hi Raghu,

On Thu, Aug 17, 2023 at 12:30:25AM +0000, Raghavendra Rao Ananta wrote:
> From: Reiji Watanabe <reijiw@google.com>
> 
> KVM does not yet support userspace modifying PMCR_EL0.N (With
> the previous patch, KVM ignores what is written by upserspace).

typo: userspace

> diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
> index ce7de6bbdc967..39ad56a71ad20 100644
> --- a/arch/arm64/kvm/pmu-emul.c
> +++ b/arch/arm64/kvm/pmu-emul.c
> @@ -896,6 +896,7 @@ int kvm_arm_set_vm_pmu(struct kvm *kvm, struct arm_pmu *arm_pmu)
>  	 * while the latter does not.
>  	 */
>  	kvm->arch.pmcr_n = arm_pmu->num_events - 1;
> +	kvm->arch.pmcr_n_limit = arm_pmu->num_events - 1;

Can't we just get at this through the arm_pmu instance rather than
copying it into kvm_arch?

>  	return 0;
>  }
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 2075901356c5b..c01d62afa7db4 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -1086,6 +1086,51 @@ static int get_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,
>  	return 0;
>  }
>  
> +static int set_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,
> +		    u64 val)
> +{
> +	struct kvm *kvm = vcpu->kvm;
> +	u64 new_n, mutable_mask;
> +	int ret = 0;
> +
> +	new_n = FIELD_GET(ARMV8_PMU_PMCR_N, val);
> +
> +	mutex_lock(&kvm->arch.config_lock);
> +	if (unlikely(new_n != kvm->arch.pmcr_n)) {
> +		/*
> +		 * The vCPU can't have more counters than the PMU
> +		 * hardware implements.
> +		 */
> +		if (new_n <= kvm->arch.pmcr_n_limit)
> +			kvm->arch.pmcr_n = new_n;
> +		else
> +			ret = -EINVAL;
> +	}

Hmm, I'm not so sure about returning an error here. ABI has it that
userspace can write any value to PMCR_EL0 successfully. Can we just
ignore writes that attempt to set PMCR_EL0.N to something higher than
supported by hardware? Our general stance should be that system register
fields responsible for feature identification are immutable after the VM
has started.

-- 
Thanks,
Oliver

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  parent reply	other threads:[~2023-09-15 20:53 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-17  0:30 [PATCH v5 00/12] KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 01/12] KVM: arm64: PMU: Introduce a helper to set the guest's PMU Raghavendra Rao Ananta
2023-09-15 19:22   ` Oliver Upton
2023-09-18 17:24     ` Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 02/12] KVM: arm64: PMU: Set the default PMU for the guest on vCPU reset Raghavendra Rao Ananta
2023-08-17  5:03   ` kernel test robot
2023-08-17  7:54   ` kernel test robot
2023-09-15 19:33   ` Oliver Upton
2023-09-18 16:41     ` Raghavendra Rao Ananta
2023-09-18 16:47       ` Oliver Upton
2023-09-18 16:58         ` Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 03/12] KVM: arm64: PMU: Clear PM{C,I}NTEN{SET,CLR} and PMOVS{SET,CLR} " Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 04/12] KVM: arm64: PMU: Don't define the sysreg reset() for PM{USERENR,CCFILTR}_EL0 Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 05/12] KVM: arm64: PMU: Simplify extracting PMCR_EL0.N Raghavendra Rao Ananta
2023-08-17  6:38   ` kernel test robot
2023-09-15 19:56   ` Oliver Upton
2023-09-18 16:53     ` Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 06/12] KVM: arm64: PMU: Add a helper to read a vCPU's PMCR_EL0 Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 07/12] KVM: arm64: PMU: Set PMCR_EL0.N for vCPU based on the associated PMU Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 08/12] KVM: arm64: PMU: Allow userspace to limit PMCR_EL0.N for the guest Raghavendra Rao Ananta
2023-08-21 12:12   ` Shaoqin Huang
2023-08-21 23:28     ` Raghavendra Rao Ananta
2023-08-22  3:26       ` Shaoqin Huang
2023-09-15 20:36         ` Oliver Upton
2023-09-18 17:02           ` Raghavendra Rao Ananta
2023-08-22 10:05   ` Shaoqin Huang
2023-08-23 16:06     ` Raghavendra Rao Ananta
2023-08-24  8:50       ` Shaoqin Huang
2023-08-25 22:34         ` Raghavendra Rao Ananta
2023-08-26  2:40           ` Shaoqin Huang
2023-09-15 20:53   ` Oliver Upton [this message]
2023-09-15 21:54     ` Oliver Upton
2023-09-18 17:11       ` Raghavendra Rao Ananta
2023-09-18 17:22         ` Raghavendra Rao Ananta
2023-09-18 17:07     ` Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 09/12] tools: Import arm_pmuv3.h Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 10/12] KVM: selftests: aarch64: Introduce vpmu_counter_access test Raghavendra Rao Ananta
2023-09-15 21:00   ` Oliver Upton
2023-09-18 17:20     ` Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 11/12] KVM: selftests: aarch64: vPMU register test for implemented counters Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 12/12] KVM: selftests: aarch64: vPMU register test for unimplemented counters Raghavendra Rao Ananta

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