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Mon, 18 Sep 2023 08:09:13 -0700 Date: Mon, 18 Sep 2023 08:09:11 -0700 From: Nicolin Chen To: Will Deacon CC: , , , , , , , , Subject: Re: [PATCH] iommu/arm-smmu-v3: Fix soft lockup triggered by arm_smmu_mm_invalidate_range Message-ID: References: <20230901203904.4073-1-nicolinc@nvidia.com> <20230918092235.GA17341@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230918092235.GA17341@willie-the-truck> X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE3C:EE_|DM4PR12MB8450:EE_ X-MS-Office365-Filtering-Correlation-Id: dbf978dd-0762-45f7-dcca-08dbb85941ce X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ktXV1QDazD4dE5UaXalnNV2loGn+C12TUB2Zxj2M6m10GThkVWSfVZ3GZFaf9brKN2RGRIIHzTzs8c4s7sIuSnHa1N6WiCJ8cVOA+2FBBy3vxWZ1qg6KfyXtKB7bcUhB4QetR78UnvsmW39da0/5gci46xuo0mYsyqfg9E1pYfEj5Mi/xLxGat6tygt8Fixryzdfa15Uk0vYAWzW4491tBFiVrLg6xb6CQf8oxlW288vu8R4b+nZzNpQ430xAwSAWmDu0EKew/H75J5PxmKBzTM15XB+JcYU7qTFsK7zFKoPS/bjsXPxsmnYD9F/S2qpKyeTawTmgwaPRmkE0xv2qoA+XAh9x7ajrR+5Zs0AZHYmOiX299KHRoQrUIuZhvMZUuEtoq9CIOtFwHrKoe/dcF53e3wBL5+rPeG36CKmMd1BzG9emZfdZKWwB0cp6E+ulkdE+vsy5RNB8oLet0F/7lZG/sRMF0fiQxoBSIbMnnmxeD0LOsXXb7JqMcndACmnj5/bKGEl2EhD5f+OpzWMYzZBNLTUArJHdf3ErMPPLl4U1apOuiF3CpP/UAbJxoebGg5pfP0L7/wb2wiJYSVyhmxLUf94TvTgJ/tEE/PmwmG2L2NRYYHx5OXuN5Wb9IIbnKXohHmTOYIeX7Fjg+qlIGoqEHkoC0sUEhn85cANKcI1vGKidbMbHYklN2tFmrkjjqb9cYk2SnZM6Iu7B5PJV0JqW8jWOUCOqVtkEFfoJZtfCbLqE91kPFfxEJPGVf2cf9Vgra3r9NKdG4C0m2Ibaw== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(136003)(396003)(346002)(376002)(39860400002)(82310400011)(451199024)(1800799009)(186009)(36840700001)(40470700004)(46966006)(33716001)(356005)(82740400003)(7636003)(55016003)(40480700001)(40460700003)(86362001)(478600001)(54906003)(70206006)(6916009)(70586007)(2906002)(9686003)(8676002)(8936002)(4326008)(5660300002)(41300700001)(316002)(47076005)(36860700001)(26005)(426003)(336012)(83380400001)(67856001);DIR:OUT;SFP:1101; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Sep 18, 2023 at 10:22:36AM +0100, Will Deacon wrote: > > @@ -201,9 +201,14 @@ static void arm_smmu_mm_invalidate_range(struct mmu_notifier *mn, > > */ > > size = end - start; > > > > - if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_BTM)) > > - arm_smmu_tlb_inv_range_asid(start, size, smmu_mn->cd->asid, > > - PAGE_SIZE, false, smmu_domain); > > + if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_BTM)) { > > + if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_RANGE_INV) && > > + size >= CMDQ_MAX_TLBI_OPS * PAGE_SIZE) > > + arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_mn->cd->asid); > > + else > > + arm_smmu_tlb_inv_range_asid(start, size, smmu_mn->cd->asid, > > + PAGE_SIZE, false, smmu_domain); > > cosmetic nit: Please use braces for the multi-line conditionals. Ack. > > + } > > arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, start, size); > > } > > > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > > index dcab85698a4e..79a81eed1dcc 100644 > > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > > @@ -326,6 +326,15 @@ > > */ > > #define CMDQ_BATCH_ENTRIES BITS_PER_LONG > > > > +/* > > + * Cloned from the MAX_TLBI_OPS in arch/arm64/include/asm/tlbflush.h, this > > + * is used as a threshold to replace per-page TLBI commands to issue in the > > + * command queue with an address-space TLBI command, when SMMU w/o a range > > + * invalidation feature handles too many per-page TLBI commands, which will > > + * otherwise result in a soft lockup. > > + */ > > +#define CMDQ_MAX_TLBI_OPS (1 << (PAGE_SHIFT - 3)) > > Maybe stick "SVA" in the name of this somewhere, since that's the reason why > looking at PAGE_SHIFT is relevant? Hmm, that does make sense, yet it wouldn't apply to the non-SVA pathway, which makes putting it in the common header meaningless. Perhaps I should have just left it in arm-smmu-v3-sva.c file... Meanwhile, we'd need to figure out another definition for non-SVA pathway. Thanks Nicolin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel