From: Nicolin Chen <nicolinc@nvidia.com>
To: Michael Shavit <mshavit@google.com>
Cc: <iommu@lists.linux.dev>, <linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <jgg@nvidia.com>,
<jean-philippe@linaro.org>, <robin.murphy@arm.com>,
<will@kernel.org>, Alistair Popple <apopple@nvidia.com>,
Dawei Li <set_pte_at@outlook.com>,
Jacob Pan <jacob.jun.pan@linux.intel.com>,
Jason Gunthorpe <jgg@ziepe.ca>, Joerg Roedel <joro@8bytes.org>,
Kevin Tian <kevin.tian@intel.com>,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Lu Baolu <baolu.lu@linux.intel.com>,
"Tomas Krcka" <krckatom@amazon.de>
Subject: Re: [PATCH v8 0/9] Refactor the SMMU's CD table ownership
Date: Tue, 19 Sep 2023 22:45:59 -0700 [thread overview]
Message-ID: <ZQqHFz4WUQOub7/F@Asurada-Nvidia> (raw)
In-Reply-To: <20230915132051.2646055-1-mshavit@google.com>
On Fri, Sep 15, 2023 at 09:17:31PM +0800, Michael Shavit wrote:
>
> Hi all,
>
> This series refactors stage 1 domains so that they describe a single CD
> entry. These entries are now inserted into a CD table that is owned by
> the arm_smmu_master instead of the domain.
> This is conceptually cleaner and unblocks other features, such as
> attaching domains with PASID (for unmanaged/dma domains).
>
> This patch series was originally part of a larger patch series that
> implemented the set_dev_pasid callback for non-SVA domains but is now
> split into a distinct series.
>
> This patch series is also available on gerrit with Jean's SMMU test
> engine patches cherry-picked on top for testing:
> https://linux-review.googlesource.com/c/linux/kernel/git/torvalds/linux/+/24742/16
>
> Thanks,
> Michael Shavit
>
> Changes in v8:
> - Rebased off of 6.6-rc1
> - Drive-by update of the "Move ctx_desc out of s1_cfg" commit message to be less
> vague.
> - Link to v7: https://lore.kernel.org/linux-iommu/20230831174536.103472-1-mshavit@google.com/
Hmm. I recall that I gave Tested-by to v7, yet some of the patches
in this v8 don't include that. Anyway, I retested with this v8:
Tested-by: Nicolin Chen <nicolinc@nvidia.com>
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next prev parent reply other threads:[~2023-09-20 5:46 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-15 13:17 [PATCH v8 0/9] Refactor the SMMU's CD table ownership Michael Shavit
2023-09-15 13:17 ` [PATCH v8 1/9] iommu/arm-smmu-v3: Move ctx_desc out of s1_cfg Michael Shavit
2023-09-15 13:17 ` [PATCH v8 2/9] iommu/arm-smmu-v3: Replace s1_cfg with cdtab_cfg Michael Shavit
2023-09-15 13:17 ` [PATCH v8 3/9] iommu/arm-smmu-v3: Encapsulate ctx_desc_cfg init in alloc_cd_tables Michael Shavit
2023-09-15 13:17 ` [PATCH v8 4/9] iommu/arm-smmu-v3: move stall_enabled to the cd table Michael Shavit
2023-09-15 13:17 ` [PATCH v8 5/9] iommu/arm-smmu-v3: Refactor write_ctx_desc Michael Shavit
2023-09-15 13:17 ` [PATCH v8 6/9] iommu/arm-smmu-v3: Move CD table to arm_smmu_master Michael Shavit
2023-09-15 13:17 ` [PATCH v8 7/9] iommu/arm-smmu-v3: Cleanup arm_smmu_domain_finalise Michael Shavit
2023-09-15 13:17 ` [PATCH v8 8/9] iommu/arm-smmu-v3: Update comment about STE liveness Michael Shavit
2023-09-15 13:17 ` [PATCH v8 9/9] iommu/arm-smmu-v3: Rename cdcfg to cd_table Michael Shavit
2023-09-20 5:45 ` Nicolin Chen [this message]
2023-10-11 23:48 ` [PATCH v8 0/9] Refactor the SMMU's CD table ownership Jason Gunthorpe
2023-10-12 14:50 ` Will Deacon
2023-10-12 18:06 ` Will Deacon
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