From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 65876E9271B for ; Thu, 5 Oct 2023 17:40:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=pvESF6Fhn8gnax5hLIe47vBhtE61XbzQMm9bhUi/90Q=; b=ywtoTcmQPWS0yd AP+kxaPQL2pGSRY3Y2UJ6SIYLE1thfwf1dfPqp9pyRNHETcKkuACwYKHyJFGzZAX2/8H/zC/i1LKX 0Rsuk4HXmtLwiLM3MzdEs9i2qhyQ0ZyKMHmIYqvKiZaYh4JrapCddKRoPoYl3MWUew8yrhNxa524v 8L3PcTMv+K8e7Oqb25r7UE5jPMihDUaSmFWaUGCKO8+eS7qwgd5ParKuP0EQyJhiqB3AXKWM/MTSj GPTnhZJKm1kM6OLghjsfIQarYX1tBAuDmvMSLhBdctJXWRkCMU2YrF8JEfqBcGi438sj0KlkLiP8v /xt0tj12F/T+Up33mNqQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qoSKH-004DZX-0K; Thu, 05 Oct 2023 17:39:53 +0000 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qoSKE-004DYx-39 for linux-arm-kernel@lists.infradead.org; Thu, 05 Oct 2023 17:39:52 +0000 Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-1c6193d6bb4so16575ad.0 for ; Thu, 05 Oct 2023 10:39:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1696527589; x=1697132389; darn=lists.infradead.org; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=IXODrEGswDBHgZt3EC36Idp+LKyU6nTpAzOo1uX2Tbo=; b=0zAJWvu+QJJxmGrFsS0QGebpNg09XFxDw84nnbRoNBFDZMggutuEJaomc+8Q2QwXus INXmcshUCbHyLnU0S4+O1ccBBywqgncrEAwStEMPvxkx4ghU3wkIyWL3HKe0K5s2O7En ezaClRSJgnFUSZxEwOUnTVLEQQxDeR1HqkK8tBizoLTIW1jcBioHAc82WlLPiX3DwzU1 FLY1gsuOBYAxA3MYUG6lgBQWrasLSBTAIblNU2XjSksCcsigqJ+GAh7gSch/59FjvRTO jAx54evWr66aNhtoEYQy3m9i+KYRIb7eFBD/gUMDTHBaQspli+H2LvMW93f8R9RK7UEI i0aw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696527589; x=1697132389; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=IXODrEGswDBHgZt3EC36Idp+LKyU6nTpAzOo1uX2Tbo=; b=BKabydMI9T5vcCdeZRE658dz3ZUljsFwNU88yP0wwZXyjBqm7eana6+rYG3izxQH0X Mu3+WSd15fkE+DLyaX5Rz9Ze/VJfqPvLHgfJpcOQc/hy1Finhp+ZPWAxaleZBwuy60yu MgJ2S+nmjbgskjho/9Omyp96MXWg6YhvKT6n2TfR1gLRMN/jOJAsU4kX+clKyyBsckZS qNtrGzD2c5CHlTjEfdfeKD6Npw+f36rrd1dHC3XFycVqt5/RLB9LsUXx27Q9+xT4EM0D c9Js9YJ1rEPJKtnqWcXFY+B4km13BXkiXt93kCVviLjkQQUT1HkpHrio5GIbYKUUpYlV 6M5Q== X-Gm-Message-State: AOJu0YxKldVWvPGlengx+FZYeqyvfrh6yB1IudF6T0CGFiY6LkT6QhXi Yybp6ekjfIo/OuGanRPbGD0BFw== X-Google-Smtp-Source: AGHT+IFvigfflXUA9HwY9N7eYv+zsvKrsN9xemzqOgeiVvG2YkDU2e3seNYkty+sv2qmvZvZeQ4iYQ== X-Received: by 2002:a17:902:d4c8:b0:1c3:5df4:a778 with SMTP id o8-20020a170902d4c800b001c35df4a778mr161516plg.13.1696527588397; Thu, 05 Oct 2023 10:39:48 -0700 (PDT) Received: from google.com (13.65.82.34.bc.googleusercontent.com. [34.82.65.13]) by smtp.gmail.com with ESMTPSA id 19-20020a170902c11300b001b896686c78sm2005265pli.66.2023.10.05.10.39.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 10:39:47 -0700 (PDT) Date: Thu, 5 Oct 2023 10:39:44 -0700 From: William McVicker To: Peter Griffin Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, conor+dt@kernel.org, sboyd@kernel.org, tomasz.figa@gmail.com, s.nawrocki@samsung.com, linus.walleij@linaro.org, wim@linux-watchdog.org, linux@roeck-us.net, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, olof@lixom.net, cw00.choi@samsung.com, tudor.ambarus@linaro.org, andre.draszik@linaro.org, semen.protsenko@linaro.org, soc@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org, kernel-team@android.com Subject: Re: [PATCH 12/21] clk: samsung: clk-pll: Add support for pll_{0516,0517,518} Message-ID: References: <20231005155618.700312-1-peter.griffin@linaro.org> <20231005155618.700312-13-peter.griffin@linaro.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20231005155618.700312-13-peter.griffin@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231005_103951_012369_1F9A6746 X-CRM114-Status: GOOD ( 22.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10/05/2023, Peter Griffin wrote: > Thesee plls are found in the Tensor gs101 SoC found in the Pixel 6. nit: Thesee -> These > > pll0516x: Integrer PLL with high frequency > pll0517x: Integrer PLL with middle frequency > pll0518x: Integrer PLL with low frequency nit: Integrer -> Integer? Regards, Will > > PLL0516x > FOUT = (MDIV * 2 * FIN)/PDIV * 2^SDIV) > > PLL0517x and PLL0518x > FOUT = (MDIV * FIN)/PDIV*2^SDIV) > > The PLLs are similar enough to pll_0822x that the same code can handle > both. The main difference is the change in the fout formula for the > high frequency 0516 pll. > > Locktime for 516,517 & 518 is 150 the same as the pll_0822x lock factor. > MDIV, SDIV PDIV masks and bit shifts are also the same as 0822x. > > When defining the PLL the "con" parameter should be set to CON3 > register, like this > > PLL(pll_0517x, CLK_FOUT_SHARED0_PLL, "fout_shared0_pll", "oscclk", > PLL_LOCKTIME_PLL_SHARED0, PLL_CON3_PLL_SHARED0, > NULL), > > Signed-off-by: Peter Griffin > --- > drivers/clk/samsung/clk-pll.c | 9 ++++++++- > drivers/clk/samsung/clk-pll.h | 3 +++ > 2 files changed, 11 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c > index 74934c6182ce..4ef9fea2a425 100644 > --- a/drivers/clk/samsung/clk-pll.c > +++ b/drivers/clk/samsung/clk-pll.c > @@ -442,7 +442,11 @@ static unsigned long samsung_pll0822x_recalc_rate(struct clk_hw *hw, > pdiv = (pll_con3 >> PLL0822X_PDIV_SHIFT) & PLL0822X_PDIV_MASK; > sdiv = (pll_con3 >> PLL0822X_SDIV_SHIFT) & PLL0822X_SDIV_MASK; > > - fvco *= mdiv; > + if (pll->type == pll_0516x) > + fvco = fvco * 2 * mdiv; > + else > + fvco *= mdiv; > + > do_div(fvco, (pdiv << sdiv)); > > return (unsigned long)fvco; > @@ -1316,6 +1320,9 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx, > case pll_1417x: > case pll_0818x: > case pll_0822x: > + case pll_0516x: > + case pll_0517x: > + case pll_0518x: > pll->enable_offs = PLL0822X_ENABLE_SHIFT; > pll->lock_offs = PLL0822X_LOCK_STAT_SHIFT; > if (!pll->rate_table) > diff --git a/drivers/clk/samsung/clk-pll.h b/drivers/clk/samsung/clk-pll.h > index 0725d485c6ee..ffd3d52c0dec 100644 > --- a/drivers/clk/samsung/clk-pll.h > +++ b/drivers/clk/samsung/clk-pll.h > @@ -38,6 +38,9 @@ enum samsung_pll_type { > pll_0822x, > pll_0831x, > pll_142xx, > + pll_0516x, > + pll_0517x, > + pll_0518x, > }; > > #define PLL_RATE(_fin, _m, _p, _s, _k, _ks) \ > -- > 2.42.0.582.g8ccd20d70d-goog > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel