From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 43525CD6119 for ; Wed, 11 Oct 2023 08:25:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2ukKbOs7/JobPKJqkAVmlusfiewqY5po7AgwjHAayXc=; b=ETvsH7+4Z2i4Ns rMaXXxtb4o3i/bwyh9XS2U7waIeYriYyDaidbs4DfQZ4HIb1dpHS27PCujZR4Om13pjEY1JvTL3w4 CkZzZDGvSiWcmJ7AcvorVUm+2p5/BIr/ofW9XGdKwg/1WUVwZJsAr6NrANLo6NxbwvvWF/nxqAA0m +BIdfc0SR1mliHy/83Hm3XB+DbxQ2DH9rRt50ytjtDtBYv0Jia4H5UpZET2e0gAkHthJ1NocB45rg TaPxTqruO9acC6iT7cWiO/rGNF1ks+azgwWXTT0VlWr0HuDJtW+k1pHoy0sshjYsgosElnukmDpHz jsqihcfuTJoqIM3TpCRQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qqUWp-00FDmt-1t; Wed, 11 Oct 2023 08:25:15 +0000 Received: from out-199.mta0.migadu.com ([2001:41d0:1004:224b::c7]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qqUWl-00FDl5-08 for linux-arm-kernel@lists.infradead.org; Wed, 11 Oct 2023 08:25:14 +0000 Date: Wed, 11 Oct 2023 08:24:56 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1697012702; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=/S0JgFqg4H1IYpuqJTqVbgL24y5HPTPBE2KO5N0Er7Y=; b=rifPWBRtD8D2d+dvqwjSDF/T7fYlgNVBaxxBWCzIc7b8xZZeknRWnFujZMp7ojIzLlyad1 +PynOxmlCk/KIRAmcn30AFb4ug9YsYDBl2LWoRMeOALhY20J+GwckhXDhAFxu5oQDg86WU 0/oU2Ft0wW4+dNOwW/VSd/RxfMpGo6A= X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Oliver Upton To: James Clark Cc: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, suzuki.poulose@arm.com, Catalin Marinas , Will Deacon , Jonathan Corbet , Russell King , Marc Zyngier , James Morse , Zenghui Yu , Mark Rutland , Zaid Al-Bassam , Reiji Watanabe , Geert Uytterhoeven , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev Subject: Re: [PATCH v3 1/3] arm: perf: Include threshold control fields valid in PMEVTYPER mask Message-ID: References: <20231010141551.2262059-1-james.clark@arm.com> <20231010141551.2262059-2-james.clark@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20231010141551.2262059-2-james.clark@arm.com> X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231011_012511_244228_F35EC3E5 X-CRM114-Status: GOOD ( 15.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi James, On Tue, Oct 10, 2023 at 03:15:41PM +0100, James Clark wrote: > FEAT_PMUv3_TH (Armv8.8) adds two new fields to PMEVTYPER, so include > them in the mask. These aren't writable on 32 bit kernels as they are in > the high part of the register, so split the mask definition to the asm > files for each platform. > > Now where the value is used in some parts of KVM, include the asm file. > There is no impact on guest PMUs emulated with KVM because the new > fields are ignored when constructing the attributes for opening the > event. But if threshold support is added to KVM at a later time no > change to the mask will be needed. KVM should treat TH and TC as RES0 if the feature isn't virtualized. I'd rather move KVM away from using ARMV8_PMU_EVTYPE_MASK in the first place. Looks like we already have an issue with the NSH bit, so I've sent the below patch to fix it. https://lore.kernel.org/kvmarm/20231011081649.3226792-3-oliver.upton@linux.dev/ -- Thanks, Oliver _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel