From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 27111C25B6B for ; Thu, 26 Oct 2023 08:24:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=8vNebkdqfFBWTGzjijDCnUO1m/AIdSdYb18fPTVbFVA=; b=K7LI7YTrbjTRGR bamcd3LZqTQyvVKcvfWdqbdMdwL0oxti6A2AfBDAGIhxRNjruA3M94OPWDkPoKpr44xu70epJ/ORb Nr9uWiytXaNMZOGwuz6XBGN38bQWzdKKZnz0asRz7rMh+bgJq9Q9SjFexBh2pHW1Ffx5aplNK1sNI RsHjHZGBKSIh8UEIjCMInS/0poAvAtaX4otkmGCWMtDjptwd91t4GJgZOzswpEuzPDDENAGuDNlGJ YPanJ8HSRfPpTJzqaBPH7Pv36pbMUtXc107CimCK3hq+vfyGdbs5ewrKDkLQAXe2VtOzu2cYhB2Eh j0LR8sCNhR9sXph/mxsQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qvvf2-00DwfT-1j; Thu, 26 Oct 2023 08:24:12 +0000 Received: from 60-248-80-70.hinet-ip.hinet.net ([60.248.80.70] helo=Atcsqr.andestech.com) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qvvey-00Dwf5-1z; Thu, 26 Oct 2023 08:24:10 +0000 Received: from mail.andestech.com (ATCPCS16.andestech.com [10.0.1.222]) by Atcsqr.andestech.com with ESMTP id 39Q8MUGX059449; Thu, 26 Oct 2023 16:22:30 +0800 (+08) (envelope-from peterlin@andestech.com) Received: from APC323 (10.0.12.98) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Thu, 26 Oct 2023 16:22:26 +0800 Date: Thu, 26 Oct 2023 16:22:22 +0800 From: Yu-Chien Peter Lin To: Conor Dooley CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v3 RESEND 10/13] dt-bindings: riscv: Add Andes PMU extension description Message-ID: References: <20231023004100.2663486-1-peterlin@andestech.com> <20231023004100.2663486-11-peterlin@andestech.com> <20231023-spectacle-module-0516fb35995a@spud> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20231023-spectacle-module-0516fb35995a@spud> User-Agent: Mutt/2.2.10 (2023-03-25) X-Originating-IP: [10.0.12.98] X-DNSRBL: X-MAIL: Atcsqr.andestech.com 39Q8MUGX059449 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231026_012409_101979_3C2BCA91 X-CRM114-Status: GOOD ( 17.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Conor, On Mon, Oct 23, 2023 at 01:03:53PM +0100, Conor Dooley wrote: > On Mon, Oct 23, 2023 at 08:40:57AM +0800, Yu Chien Peter Lin wrote: > > Document the ISA string for Andes Technology performance monitor > > extension which provides counter overflow interrupt and mode > > filtering mechanisms. > > > > Signed-off-by: Yu Chien Peter Lin > > --- > > Changes v2 -> v3: > > - New patch > > --- > > Documentation/devicetree/bindings/riscv/extensions.yaml | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml > > index 5e9291d258d5..e0694e2adbc2 100644 > > --- a/Documentation/devicetree/bindings/riscv/extensions.yaml > > +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml > > @@ -246,6 +246,13 @@ properties: > > in commit 2e5236 ("Ztso is now ratified.") of the > > riscv-isa-manual. > > > > + - const: xandespmu > > + description: > > + The Andes Technology performance monitor extension for counter overflow > > + and privilege mode filtering. For more details, see Counter Related > > + Registers in the AX45MP datasheet. > > + https://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf > > Does/will this PMU function identically on the other CPUs that support it? Yes, I can confirm that. Thanks for the review. Best regards, Peter Lin > I assume the answer is yes. > > Cheers, > Conor. > > > + > > - const: xtheadpmu > > description: > > The T-Head performance monitor extension for counter overflow. For more > > -- > > 2.34.1 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel