From: Yu-Chien Peter Lin <peterlin@andestech.com>
To: Inochi Amaoto <inochiama@outlook.com>
Cc: Guo Ren <guoren@kernel.org>, <acme@kernel.org>,
<adrian.hunter@intel.com>, <ajones@ventanamicro.com>,
<alexander.shishkin@linux.intel.com>, <andre.przywara@arm.com>,
<anup@brainfault.org>, <aou@eecs.berkeley.edu>,
<atishp@atishpatra.org>, <conor+dt@kernel.org>,
<conor.dooley@microchip.com>, <conor@kernel.org>,
<devicetree@vger.kernel.org>, <dminus@andestech.com>,
<evan@rivosinc.com>, <geert+renesas@glider.be>, <heiko@sntech.de>,
<irogers@google.com>, <jernej.skrabec@gmail.com>,
<jolsa@kernel.org>, <jszhang@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-perf-users@vger.kernel.org>,
<linux-renesas-soc@vger.kernel.org>,
<linux-riscv@lists.infradead.org>, <linux-sunxi@lists.linux.dev>,
<locus84@andestech.com>, <magnus.damm@gmail.com>,
<mark.rutland@arm.com>, <mingo@redhat.com>, <n.shubin@yadro.com>,
<namhyung@kernel.org>, <palmer@dabbelt.com>,
<paul.walmsley@sifive.com>, <peterz@infradead.org>,
<prabhakar.mahadev-lad.rj@bp.renesas.com>,
<rdunlap@infradead.org>, <robh+dt@kernel.org>,
<samuel@sholland.org>, <sunilvl@ventanamicro.com>,
<tglx@linutronix.de>, <tim609@andestech.com>, <uwu@icenowy.me>,
<wens@csie.org>, <will@kernel.org>, <ycliang@andestech.com>
Subject: Re: [PATCH v4 09/13] dt-bindings: riscv: Add T-Head PMU extension description
Date: Wed, 6 Dec 2023 11:14:08 +0800 [thread overview]
Message-ID: <ZW_nAMRDWoMo6t8r@APC323> (raw)
In-Reply-To: <IA1PR20MB4953460FE5BF431DD32CD860BB81A@IA1PR20MB4953.namprd20.prod.outlook.com>
On Fri, Dec 01, 2023 at 09:14:00AM +0800, Inochi Amaoto wrote:
<...>
> >>
> >> Hi, Peter Lin:
> >>
> >> You can use the following two document to get all events:
> >> https://github.com/T-head-Semi/openc906/tree/main/doc
> >> https://github.com/T-head-Semi/openc910/tree/main/doc
> >>
> >> There are also some RTL code can describe these events:
> >> https://github.com/T-head-Semi/openc910/blob/e0c4ad8ec7f8c70f649d826ebd6c949086453272/C910_RTL_FACTORY/gen_rtl/pmu/rtl/ct_hpcp_top.v#L1123
> >> https://github.com/T-head-Semi/openc906/blob/af5614d72de7e5a4b8609c427d2e20af1deb21c4/C906_RTL_FACTORY/gen_rtl/pmu/rtl/aq_hpcp_top.v#L543
> >>
> >> The perf events json can also be used as document, this is already
> >> applied (with more detailed explanation):
> >> https://lore.kernel.org/all/IA1PR20MB495325FCF603BAA841E29281BBBAA@IA1PR20MB4953.namprd20.prod.outlook.com/
> >
> >Thanks for reaching out!
> >The updated description will be:
> >
> >- const: xtheadpmu
> > description:
> > The T-Head performance monitor extension for counter overflow, as ratified
> > in commit bd9206 ("Initial commit") of Xuantie C906 user manual.
> > https://github.com/T-head-Semi/openc906/tree/main/doc
> >
> >Is it OK with you?
> >
>
> Please indicate chapter 12 and chapter 13.5 of the manual related to
> the PMU. And changed openc906 manual to openc910 manual because it is
> more updated.
>
> If modified:
>
> Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Got it! Thanks for the information.
Regards,
Peter Lin
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-12-06 3:17 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20231122121235.827122-1-peterlin@andestech.com>
[not found] ` <20231122121235.827122-6-peterlin@andestech.com>
2023-11-22 16:36 ` [PATCH v4 05/13] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC Geert Uytterhoeven
[not found] ` <20231122121235.827122-10-peterlin@andestech.com>
2023-11-22 21:14 ` [PATCH v4 09/13] dt-bindings: riscv: Add T-Head PMU extension description Guo Ren
2023-11-29 8:48 ` Yu-Chien Peter Lin
[not found] ` <IA1PR20MB49537364BDF1ADE185CA8FE4BB82A@IA1PR20MB4953.namprd20.prod.outlook.com>
2023-11-30 9:21 ` Yu-Chien Peter Lin
[not found] ` <IA1PR20MB4953A05B9162AA2659DE78A5BB82A@IA1PR20MB4953.namprd20.prod.outlook.com>
2023-11-30 12:58 ` Conor Dooley
[not found] ` <IA1PR20MB495378652B09B37E92D8BB04BB82A@IA1PR20MB4953.namprd20.prod.outlook.com>
2023-12-01 0:40 ` Conor Dooley
[not found] ` <IA1PR20MB4953460FE5BF431DD32CD860BB81A@IA1PR20MB4953.namprd20.prod.outlook.com>
2023-12-06 3:14 ` Yu-Chien Peter Lin [this message]
2023-11-23 14:48 ` Conor Dooley
2023-11-29 8:47 ` Yu-Chien Peter Lin
2023-11-29 12:33 ` Conor Dooley
[not found] ` <20231122121235.827122-8-peterlin@andestech.com>
2023-11-22 21:16 ` [PATCH v4 07/13] RISC-V: Move T-Head PMU to CPU feature alternative framework Guo Ren
2023-11-23 14:45 ` Conor Dooley
[not found] ` <20231122121235.827122-5-peterlin@andestech.com>
2023-11-23 14:38 ` [PATCH v4 04/13] dt-bindings: riscv: Add Andes interrupt controller compatible string Conor Dooley
[not found] ` <CA+V-a8t+vgrwDe9OxqMNHdcVX+qq76DuskF0ETCri4VeP-FAbg@mail.gmail.com>
2023-11-29 6:43 ` Yu-Chien Peter Lin
[not found] ` <20231122121235.827122-12-peterlin@andestech.com>
2023-11-22 21:12 ` [PATCH v4 11/13] riscv: dts: allwinner: Add T-Head PMU extension Guo Ren
2023-11-23 14:58 ` Conor Dooley
2023-11-29 9:34 ` Yu-Chien Peter Lin
[not found] ` <20231122121235.827122-3-peterlin@andestech.com>
[not found] ` <871qbwsn9h.ffs@tglx>
2023-12-12 10:17 ` [PATCH v4 02/13] irqchip/riscv-intc: Allow large non-standard interrupt number Yu-Chien Peter Lin
[not found] ` <20231122121235.827122-4-peterlin@andestech.com>
[not found] ` <87y1e4r8db.ffs@tglx>
2023-12-12 10:28 ` [PATCH v4 03/13] irqchip/riscv-intc: Introduce Andes hart-level interrupt controller Yu-Chien Peter Lin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZW_nAMRDWoMo6t8r@APC323 \
--to=peterlin@andestech.com \
--cc=acme@kernel.org \
--cc=adrian.hunter@intel.com \
--cc=ajones@ventanamicro.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=andre.przywara@arm.com \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=atishp@atishpatra.org \
--cc=conor+dt@kernel.org \
--cc=conor.dooley@microchip.com \
--cc=conor@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dminus@andestech.com \
--cc=evan@rivosinc.com \
--cc=geert+renesas@glider.be \
--cc=guoren@kernel.org \
--cc=heiko@sntech.de \
--cc=inochiama@outlook.com \
--cc=irogers@google.com \
--cc=jernej.skrabec@gmail.com \
--cc=jolsa@kernel.org \
--cc=jszhang@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux-sunxi@lists.linux.dev \
--cc=locus84@andestech.com \
--cc=magnus.damm@gmail.com \
--cc=mark.rutland@arm.com \
--cc=mingo@redhat.com \
--cc=n.shubin@yadro.com \
--cc=namhyung@kernel.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=peterz@infradead.org \
--cc=prabhakar.mahadev-lad.rj@bp.renesas.com \
--cc=rdunlap@infradead.org \
--cc=robh+dt@kernel.org \
--cc=samuel@sholland.org \
--cc=sunilvl@ventanamicro.com \
--cc=tglx@linutronix.de \
--cc=tim609@andestech.com \
--cc=uwu@icenowy.me \
--cc=wens@csie.org \
--cc=will@kernel.org \
--cc=ycliang@andestech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox