From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3DB46C47258 for ; Tue, 23 Jan 2024 20:40:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=cI7ynEpCy8ayMoQCcAeGL0XVU5uVpOMHvgWW1YJpxQM=; b=lVhAO+t2ck6C3M gA1d5Dt6HjRpOuEInpwUlp6XY7iWIqW38h2RoURVHTkKN/zRV8aK58LOLRx6JoPZrjiL8nfMKQzos YO1gkCq4Hvmmtboy3eQWUMjKLLU4IvV+VGtTTCmp5cS01tpuQxZMpsAmtywGiCmouy5n5eKy6HS1O NGmTD2lR9+gEOg/kZMxQiBJBBRH8ROaenn4uzJ2TXiN4Epk1DHpnAS8RBX+UEjPDQidJJKr8bWybB ySfy/8OqgyM1xEjYmTlt1B0VEL/nLg8QnKNkiK9Ypc/2o43/ps8396VKx/ZQGOzPNWuzWcFGIcioz GRmeHrLsvGYjeqLeuVXQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rSNYY-000Pyg-1y; Tue, 23 Jan 2024 20:39:38 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rSNYV-000PwF-1i for linux-arm-kernel@lists.infradead.org; Tue, 23 Jan 2024 20:39:37 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 34B6161F26; Tue, 23 Jan 2024 20:39:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4E0E9C433F1; Tue, 23 Jan 2024 20:38:58 +0000 (UTC) Date: Tue, 23 Jan 2024 20:38:55 +0000 From: Catalin Marinas To: Mark Rutland Cc: Jason Gunthorpe , Niklas Schnelle , Leon Romanovsky , Arnd Bergmann , linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rdma@vger.kernel.org, llvm@lists.linux.dev, Michael Guralnik , Nathan Chancellor , Nick Desaulniers , Will Deacon , Marc Zyngier Subject: Re: [PATCH rdma-next 1/2] arm64/io: add memcpy_toio_64 Message-ID: References: <20231205175127.GJ2692119@nvidia.com> <20231205195130.GM2692119@nvidia.com> <20231206125919.GP2692119@nvidia.com> <20240116185121.GB980613@nvidia.com> <20240117123618.GD734935@nvidia.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240123_123935_628678_29EFFA7A X-CRM114-Status: GOOD ( 21.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org (fixed Marc's email address) On Wed, Jan 17, 2024 at 01:29:06PM +0000, Mark Rutland wrote: > On Wed, Jan 17, 2024 at 08:36:18AM -0400, Jason Gunthorpe wrote: > > On Wed, Jan 17, 2024 at 12:30:00PM +0000, Mark Rutland wrote: > > > On Tue, Jan 16, 2024 at 02:51:21PM -0400, Jason Gunthorpe wrote: > > > > I'm just revising this and I'm wondering if you know why ARM64 has this: > > > > > > > > #define __raw_writeq __raw_writeq > > > > static __always_inline void __raw_writeq(u64 val, volatile void __iomem *addr) > > > > { > > > > asm volatile("str %x0, [%1]" : : "rZ" (val), "r" (addr)); > > > > } > > > > > > > > Instead of > > > > > > > > #define __raw_writeq __raw_writeq > > > > static __always_inline void __raw_writeq(u64 val, volatile void __iomem *addr) > > > > { > > > > asm volatile("str %x0, %1" : : "rZ" (val), "m" (*(volatile u64 *)addr)); > > > > } > > > > > > > > ?? Like x86 has. > > > > > > I believe this is for the same reason as doing so in all of our other IO > > > accessors. > > > > > > We've deliberately ensured that our IO accessors use a single base register > > > with no offset as this is the only form that HW can represent in ESR_ELx.ISS.SRT > > > when reporting a stage-2 abort, which a hypervisor may use for > > > emulating IO. > > > > Wow, harming bare metal performace to accommodate imperfect emulation > > sounds like a horrible reason :( > > Having working functionality everywhere is a very good reason. :) > > > So what happens with this patch where IO is done with STP? Are you > > going to tell me I can't do it because of this? > > I'm not personally going to make that judgement, but it's certainly something > for Catalin and Will to consider (and I've added Marc in case he has any > opinion). Good point, I missed this part. We definitely can't use STP in the I/O accessors, we'd have a big surprise when running the same code in a guest with emulated I/O. If eight STRs without other operations interleaved give us the write-combining on most CPUs (with Normal NC), we should go with this instead of STP. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel