From: Oliver Upton <oliver.upton@linux.dev>
To: Marc Zyngier <maz@kernel.org>
Cc: James Clark <james.clark@arm.com>,
coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
kvmarm@lists.linux.dev, broonie@kernel.org,
suzuki.poulose@arm.com, acme@kernel.org,
James Morse <james.morse@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Mike Leach <mike.leach@linaro.org>,
Leo Yan <leo.yan@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Rob Herring <robh@kernel.org>,
Miguel Luis <miguel.luis@oracle.com>,
Jintack Lim <jintack.lim@linaro.org>,
Ard Biesheuvel <ardb@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Arnd Bergmann <arnd@arndb.de>,
Vincent Donnefort <vdonnefort@google.com>,
Kristina Martsenko <kristina.martsenko@arm.com>,
Fuad Tabba <tabba@google.com>, Joey Gouly <joey.gouly@arm.com>,
Akihiko Odaki <akihiko.odaki@daynix.com>,
Jing Zhang <jingzhangos@google.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 2/7] arm64: KVM: Use shared area to pass PMU event state to hypervisor
Date: Mon, 5 Feb 2024 13:21:26 +0000 [thread overview]
Message-ID: <ZcDg1sP3EYZG-i_3@linux.dev> (raw)
In-Reply-To: <867cjj6ohz.wl-maz@kernel.org>
On Mon, Feb 05, 2024 at 01:15:36PM +0000, Marc Zyngier wrote:
> On Mon, 05 Feb 2024 13:04:51 +0000,
> Oliver Upton <oliver.upton@linux.dev> wrote:
> >
> > Unless someone has strong opinions about making this work in protected
> > mode, I am happy to see tracing support limited to the 'normal' nVHE
> > configuration. The protected feature as a whole is just baggage until
> > upstream support is completed.
>
> Limiting tracing to non-protected mode is a must IMO. Allowing tracing
> when pKVM is enabled is a sure way to expose secrets that should
> stay... secret. The only exception I can think of is when
> CONFIG_NVHE_EL2_DEBUG is enabled, at which point all bets are off.
Zero argument there :) I left off the "and PMU" part of what I was
saying, because that was a feature that semi-worked in protected mode
before VM/VCPU shadowing support landed.
--
Thanks,
Oliver
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next prev parent reply other threads:[~2024-02-05 13:21 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-04 16:27 [PATCH v4 0/7] kvm/coresight: Support exclude guest and exclude host James Clark
2024-01-04 16:27 ` [PATCH v4 1/7] arm64: KVM: Fix renamed function in comment James Clark
2024-01-04 16:58 ` Suzuki K Poulose
2024-01-04 16:27 ` [PATCH v4 2/7] arm64: KVM: Use shared area to pass PMU event state to hypervisor James Clark
2024-01-05 9:40 ` Suzuki K Poulose
2024-02-01 16:14 ` James Clark
2024-02-02 22:00 ` Oliver Upton
2024-02-05 12:16 ` James Clark
2024-02-05 13:04 ` Oliver Upton
2024-02-05 13:15 ` Marc Zyngier
2024-02-05 13:21 ` Oliver Upton [this message]
2024-02-05 14:16 ` Marc Zyngier
2024-02-05 14:17 ` James Clark
2024-02-05 14:52 ` Marc Zyngier
2024-02-05 15:37 ` James Clark
2024-02-05 15:50 ` Marc Zyngier
2024-02-05 16:38 ` Oliver Upton
2024-01-04 16:27 ` [PATCH v4 3/7] arm64/sysreg/tools: Move TRFCR definitions to sysreg James Clark
2024-01-05 9:18 ` Suzuki K Poulose
2024-01-05 9:59 ` James Clark
2024-01-04 16:27 ` [PATCH v4 4/7] arm64: KVM: Add iflag for FEAT_TRF James Clark
2024-01-04 16:27 ` [PATCH v4 5/7] arm64: KVM: Add interface to set guest value for TRFCR register James Clark
2024-01-05 9:20 ` Suzuki K Poulose
2024-01-04 16:27 ` [PATCH v4 6/7] arm64: KVM: Write TRFCR value on guest switch with nVHE James Clark
2024-01-05 9:50 ` Suzuki K Poulose
2024-01-05 10:05 ` James Clark
2024-01-04 16:27 ` [PATCH v4 7/7] coresight: Pass guest TRFCR value to KVM James Clark
2024-01-05 9:55 ` Suzuki K Poulose
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