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From: Oliver Upton To: Ganapatrao Kulkarni Cc: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, maz@kernel.org, catalin.marinas@arm.com, will@kernel.org, suzuki.poulose@arm.com, james.morse@arm.com, corbet@lwn.net, boris.ostrovsky@oracle.com, darren@os.amperecomputing.com, d.scott.phillips@amperecomputing.com Subject: Re: [PATCH] arm64: errata: Minimize tlb flush due to vttbr writes on AmpereOne Message-ID: References: <20240207090458.463021-1-gankulkarni@os.amperecomputing.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240207090458.463021-1-gankulkarni@os.amperecomputing.com> X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240207_014619_393149_5213381E X-CRM114-Status: GOOD ( 13.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Feb 07, 2024 at 01:04:58AM -0800, Ganapatrao Kulkarni wrote: > AmpereOne implementation is doing tlb flush when ever there is > a write to vttbr_el2. As per KVM implementation, vttbr_el2 is updated > with VM's S2-MMU while return to VM. This is not necessary when there > is no VM context switch and a just return to same Guest. > > Adding a check to avoid the vttbr_el2 write if the same value > already exist to prevent needless tlb flush. Sorry, zero interest in taking what is really a uarch optimization. The errata framework exists to allow the kernel achieve *correctness* on a variety of hardware and is not a collection of party tricks for optimizing any given implementation. Think of the precedent this would establish. What would stop implementers from, say, changing out our memcpy implementation into a a hundred different uarch-specific routines. That isn't maintainable, nor is it even testable as most folks don't have access to your hardware. Ignoring all of that -- I question the necessity of these patches altogether. KVM writes to VTTBR at the time of vcpu load as of commit 934bf871f011 ("KVM: arm64: Load the stage-2 MMU context in kvm_vcpu_load_vhe()"), which should drastically reduce the overhead of this hardware fix. -- Thanks, Oliver _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel