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From: Oliver Upton To: Marc Zyngier Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, James Morse , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , Joey Gouly , Mark Brown Subject: Re: [PATCH v3 05/26] KVM: arm64: nv: Add sanitising to VNCR-backed FGT sysregs Message-ID: References: <20240205103431.1104133-1-maz@kernel.org> <20240205103431.1104133-6-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240205103431.1104133-6-maz@kernel.org> X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240207_025806_109962_F2D585C0 X-CRM114-Status: GOOD ( 16.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Feb 05, 2024 at 10:34:10AM +0000, Marc Zyngier wrote: > Fine Grained Traps are controlled by a whole bunch of features. > Each one of them must be checked and the corresponding masks > computed so that we don't let the guest apply traps it shouldn't > be using. > > This takes care of HFG[IRW]TR_EL2, HDFG[RW]TR_EL2, and HAFGRTR_EL2. > > Signed-off-by: Marc Zyngier > Reviewed-by: Joey Gouly > --- > arch/arm64/kvm/nested.c | 128 ++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 128 insertions(+) > > diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c > index a8fe0f970e04..31c4ce0439d6 100644 > --- a/arch/arm64/kvm/nested.c > +++ b/arch/arm64/kvm/nested.c > @@ -265,6 +265,134 @@ int kvm_init_nv_sysregs(struct kvm *kvm) > res1 |= HCR_E2H; > set_sysreg_masks(kvm, HCR_EL2, res0, res1); > > + /* HFG[RW]TR_EL2 */ > + res0 = res1 = 0; > + if (!(__vcpu_has_feature(&kvm->arch, KVM_ARM_VCPU_PTRAUTH_ADDRESS) && > + __vcpu_has_feature(&kvm->arch, KVM_ARM_VCPU_PTRAUTH_ADDRESS))) Same thing here w/ the different flags. > + /* HDFG[RW]TR_EL2 */ > + res0 = res1 = 0; > + if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, DoubleLock, IMP)) > + res0 |= HDFGRTR_EL2_OSDLR_EL1; > + if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMUVer, IMP)) > + res0 |= (HDFGRTR_EL2_PMEVCNTRn_EL0 | HDFGRTR_EL2_PMEVTYPERn_EL0 | > + HDFGRTR_EL2_PMCCFILTR_EL0 | HDFGRTR_EL2_PMCCNTR_EL0 | > + HDFGRTR_EL2_PMCNTEN | HDFGRTR_EL2_PMINTEN | > + HDFGRTR_EL2_PMOVS | HDFGRTR_EL2_PMSELR_EL0 | > + HDFGRTR_EL2_PMMIR_EL1 | HDFGRTR_EL2_PMUSERENR_EL0 | > + HDFGRTR_EL2_PMCEIDn_EL0); I think you're missing HDFGWTR_EL2_PMSWINC_EL0 and HDFGWTR_EL2_PMCR_EL0 here. Silly write-only and read-only registers... -- Thanks, Oliver _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel