From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6EB28C4828F for ; Thu, 8 Feb 2024 13:01:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=IGWVE2+DkoowTmkq0GmiVQ13IsKmbobNYBlxhR0Dr8Q=; b=PMA/Ya8CLoDMnK Fe2ejtCSHskCxalKnJDtgH+gDxRzmqJnZ/KXBZCWFXwFOC/kfCn3HcBVksi5T+n4EoCI03xpLqKs6 8vlfDy/acWhnL7KmLhTAGgkRaH0sN7RZH0qxI/ZyGkAmhltC5rTFzonW3PlK4dSn0CdFQli7E0tMe +UFeF/K4VmO4Mg3+ChaOC5owAt11RtloJAny1J6A517KWpfoUL7RwkxDmBZPDZA5X8uzB7578iD4+ B/pztT1n3EAHsn2cIhBvUEfr7xH2pf8YFxRiw6pJfF/FmbKsqUkrLQcrpLONhvacNZWRm0KLGIYYZ X6eQtsssvNkfcSa5vw3w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rY41j-0000000DogS-0VPH; Thu, 08 Feb 2024 13:01:15 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rY41e-0000000Dofg-3kzA for linux-arm-kernel@lists.infradead.org; Thu, 08 Feb 2024 13:01:13 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D4C6F1FB; Thu, 8 Feb 2024 05:01:48 -0800 (PST) Received: from arm.com (RQ4T19M611.cambridge.arm.com [10.1.31.53]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CF6FB3F5A1; Thu, 8 Feb 2024 05:01:01 -0800 (PST) Date: Thu, 8 Feb 2024 13:00:59 +0000 From: Catalin Marinas To: ankita@nvidia.com Cc: jgg@nvidia.com, maz@kernel.org, oliver.upton@linux.dev, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, reinette.chatre@intel.com, surenb@google.com, stefanha@redhat.com, brauner@kernel.org, will@kernel.org, mark.rutland@arm.com, alex.williamson@redhat.com, kevin.tian@intel.com, yi.l.liu@intel.com, ardb@kernel.org, akpm@linux-foundation.org, andreyknvl@gmail.com, wangjinchao@xfusion.com, gshan@redhat.com, ricarkol@google.com, linux-mm@kvack.org, lpieralisi@kernel.org, rananta@google.com, ryan.roberts@arm.com, aniketa@nvidia.com, cjia@nvidia.com, kwankhede@nvidia.com, targupta@nvidia.com, vsethi@nvidia.com, acurrid@nvidia.com, apopple@nvidia.com, jhubbard@nvidia.com, danw@nvidia.com, kvmarm@lists.linux.dev, mochs@nvidia.com, zhiw@nvidia.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v6 1/4] kvm: arm64: introduce new flag for non-cacheable IO memory Message-ID: References: <20240207204652.22954-1-ankita@nvidia.com> <20240207204652.22954-2-ankita@nvidia.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240207204652.22954-2-ankita@nvidia.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240208_050111_005061_7CCCE706 X-CRM114-Status: GOOD ( 12.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Feb 08, 2024 at 02:16:49AM +0530, ankita@nvidia.com wrote: > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c > index c651df904fe3..2a893724ee9b 100644 > --- a/arch/arm64/kvm/hyp/pgtable.c > +++ b/arch/arm64/kvm/hyp/pgtable.c > @@ -717,15 +717,28 @@ void kvm_tlb_flush_vmid_range(struct kvm_s2_mmu *mmu, > static int stage2_set_prot_attr(struct kvm_pgtable *pgt, enum kvm_pgtable_prot prot, > kvm_pte_t *ptep) > { > - bool device = prot & KVM_PGTABLE_PROT_DEVICE; > - kvm_pte_t attr = device ? KVM_S2_MEMATTR(pgt, DEVICE_nGnRE) : > - KVM_S2_MEMATTR(pgt, NORMAL); > + kvm_pte_t attr; > u32 sh = KVM_PTE_LEAF_ATTR_LO_S2_SH_IS; > > + switch (prot & (KVM_PGTABLE_PROT_DEVICE | > + KVM_PGTABLE_PROT_NORMAL_NC)) { > + case 0: > + attr = KVM_S2_MEMATTR(pgt, NORMAL); > + break; > + case KVM_PGTABLE_PROT_DEVICE: > + if (prot & KVM_PGTABLE_PROT_X) > + return -EINVAL; > + attr = KVM_S2_MEMATTR(pgt, DEVICE_nGnRE); > + break; > + case KVM_PGTABLE_PROT_NORMAL_NC: > + attr = KVM_S2_MEMATTR(pgt, NORMAL_NC); > + break; Does it make sense to allow executable here as well? I don't think it's harmful but not sure there's a use-case for it either. > + default: > + WARN_ON_ONCE(1); Return -EINVAL? -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel