Re: [PATCH] ARM: iwmmxt: Remove support for PJ4/PJ4B cores

From: Jisheng Zhang <jszhang@kernel.org>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Ard Biesheuvel <ardb+git@google.com>,
	linux-arm-kernel@lists.infradead.org,
	Ard Biesheuvel <ardb@kernel.org>,
	Nicolas Pitre <nico@fluxnic.net>,
	Russell King <linux@armlinux.org.uk>,
	Linus Walleij <linus.walleij@linaro.org>,
	Lubomir Rintel <lkundrak@v3.sk>, Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Gregory Clement <gregory.clement@bootlin.com>
Subject: Re: [PATCH] ARM: iwmmxt: Remove support for PJ4/PJ4B cores
Date: Sun, 11 Feb 2024 15:01:15 +0800	[thread overview]
Message-ID: <Zchwu2OqHLvEIgln@xhacker> (raw)
In-Reply-To: <0bc7c97c-6549-4ae1-9787-4702e7ab737e@app.fastmail.com>

On Fri, Feb 09, 2024 at 03:27:02PM +0100, Arnd Bergmann wrote:
> On Fri, Feb 9, 2024, at 12:09, Ard Biesheuvel wrote:
> > From: Ard Biesheuvel <ardb@kernel.org>
> >
> > PJ4 is a v7 core that incorporates a iWMMXt coprocessor. However, GCC
> > does not support this combination (its iWMMXt configuration always
> > implies v5te), and so there is no v6/v7 user space that actually makes
> > use of this, beyond generic support for things like setjmp() that
> > preserve/restore the iWMMXt register file using generic LDC/STC
> > instructions emitted in assembler. As [0] appears to imply, this logic
> > is triggered for the init process at boot, and so most processes will
> > have a iWMMXt register context associated with it, even though it is
> > never used.
> >
> > This means that advertising iWMMXt support on these cores results in
> > context switch overhead without any associated benefit, and so it is
> > better to simply ignore the iWMMXt unit on these systems. So rip out the
> > support. Doing so also fixes the issue reported in [0] related to UNDEF
> > handling of co-processor #0/#1 instructions issued from user space
> > running in Thumb2 mode.
> >
> > Cc: Arnd Bergmann <arnd@arndb.de>
> > Cc: Nicolas Pitre <nico@fluxnic.net>
> > Cc: Russell King <linux@armlinux.org.uk>
> > Cc: Linus Walleij <linus.walleij@linaro.org>
> > Fixes: 8bcba70cb5c22 ("ARM: entry: Disregard Thumb undef exception ...")
> > Link: https://bugzilla.kernel.org/show_bug.cgi?id=218427 [0]
> > Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
> 
> Acked-by: Arnd Bergmann <arnd@arndb.de>

For berlin SoC

Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
> 
> Maybe add a bit about which cores are actually affected by this:
> 
> The PJ4 cores are used in four platforms: armada 370/xp, dove
> (cubox, d2plug), mmp2 (xo-1.75) and berlin (chromecast 1).

Per berlin2cd.dtsi, chromecast is powered by CA9 ;)

> Out of these, only the first is still widely used, but that
> one actually doesn't have iwmmxt but instead has only
> vfpv3-d16.
> 
> I've also added the maintainers of those platforms to Cc,
> in case anyone has objections after all.
> 
>       Arnd

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel