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Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rcqWC-00000001weR-1cXs; Wed, 21 Feb 2024 17:36:28 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rcqW8-00000001wcr-2D66 for linux-arm-kernel@lists.infradead.org; Wed, 21 Feb 2024 17:36:26 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 7955E61563; Wed, 21 Feb 2024 17:36:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 982E7C43390; Wed, 21 Feb 2024 17:36:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708536983; bh=FBGqpKAA9DVgR/KsZ8XAxEsUtjWu73WE67lO3LqitDc=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=T7AMAgbi7tHInRDOxGiZRoHrGh/u6AXtjf8NsdlBn6ISIUdaHnB3dgeodWPKtFXGh vv6ulfqLLGMhmAI4ced3e1GLKc1PWdytCidJsEFr/loKRMpGKuSMUMrKqmIyEl6jfj 4pLm/2ZimizHqevf580yZWtjv22y9WOJOzJ0rmCvnxKuminONWs6yPR86x9mjIiNCH AaPKlccAW4n52S3EiZGO2J0dF4EGk8nIahATLimGkm6E0itbF0LBE5kgkVgqfg7Q9D ks2uEqlghX6c7G+JgElksZmWCvoF5VGShMUCZUpCwDPziUieFel9wWDAKQ+d8VPRA7 NRctrqeFYkCwg== Date: Wed, 21 Feb 2024 18:36:19 +0100 From: Lorenzo Bianconi To: AngeloGioacchino Del Regno Cc: linux-arm-kernel@lists.infradead.org, lorenzo.bianconi@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, nbd@nbd.name, john@phrozen.org, devicetree@vger.kernel.org, dd@embedd.com, catalin.marinas@arm.com, will@kernel.org Subject: Re: [PATCH v2 2/4] arm64: dts: Add Airoha EN7581 SoC and EN7581 Evaluation Board Message-ID: References: <7a623f15-02cc-4508-88e2-da12aaeee242@collabora.com> MIME-Version: 1.0 In-Reply-To: <7a623f15-02cc-4508-88e2-da12aaeee242@collabora.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240221_093624_696393_699B1DEE X-CRM114-Status: GOOD ( 30.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============8389962209950151123==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============8389962209950151123== Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="DbQX4Mk9h2ElNWSu" Content-Disposition: inline --DbQX4Mk9h2ElNWSu Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable > > From: Daniel Danzberger > >=20 > > Introduce the Airoha EN7581 SoC's dtsi and the Airoha EN7581 Evaluation > > Board's dts file, as well as the required Makefiles. > >=20 > > Signed-off-by: Daniel Danzberger > > Signed-off-by: Lorenzo Bianconi > > --- > > arch/arm64/boot/dts/Makefile | 1 + > > arch/arm64/boot/dts/airoha/Makefile | 2 + > > arch/arm64/boot/dts/airoha/en7581-evb.dts | 27 +++++ > > arch/arm64/boot/dts/airoha/en7581.dtsi | 137 ++++++++++++++++++++++ > > 4 files changed, 167 insertions(+) > > create mode 100644 arch/arm64/boot/dts/airoha/Makefile > > create mode 100644 arch/arm64/boot/dts/airoha/en7581-evb.dts > > create mode 100644 arch/arm64/boot/dts/airoha/en7581.dtsi > >=20 > > diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile > > index 30dd6347a929..21cd3a87f385 100644 > > --- a/arch/arm64/boot/dts/Makefile > > +++ b/arch/arm64/boot/dts/Makefile > > @@ -1,5 +1,6 @@ > > # SPDX-License-Identifier: GPL-2.0 > > subdir-y +=3D actions > > +subdir-y +=3D airoha > > subdir-y +=3D allwinner > > subdir-y +=3D altera > > subdir-y +=3D amazon > > diff --git a/arch/arm64/boot/dts/airoha/Makefile b/arch/arm64/boot/dts/= airoha/Makefile > > new file mode 100644 > > index 000000000000..ebea112ce1d7 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/airoha/Makefile > > @@ -0,0 +1,2 @@ > > +# SPDX-License-Identifier: GPL-2.0-only > > +dtb-$(CONFIG_ARCH_AIROHA) +=3D en7581-evb.dtb > > diff --git a/arch/arm64/boot/dts/airoha/en7581-evb.dts b/arch/arm64/boo= t/dts/airoha/en7581-evb.dts > > new file mode 100644 > > index 000000000000..4eaa8ac431c3 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/airoha/en7581-evb.dts > > @@ -0,0 +1,27 @@ > > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +/dts-v1/; > > + > > +/* Bootloader installs ATF here */ > > +/memreserve/ 0x80000000 0x200000; > > + > > +#include "en7581.dtsi" > > + > > +/ { > > + model =3D "Airoha EN7581 Evaluation Board"; > > + compatible =3D "airoha,en7581-evb", "airoha,en7581"; > > + > > + aliases { > > + serial0 =3D &uart1; > > + }; > > + > > + chosen { > > + bootargs =3D "console=3DttyS0,115200 earlycon"; > > + stdout-path =3D "serial0:115200n8"; > > + linux,usable-memory-range =3D <0x0 0x80200000 0x0 0x1fe00000>; > > + }; > > + > > + memory@80000000 { > > + device_type =3D "memory"; > > + reg =3D <0x0 0x80000000 0x2 0x00000000>; >=20 > Is your bootloader really not filling the size for the memory node? is the size 0x200000000? Am I missing something? >=20 > Can you please verify? > If it doesn't, it's not a problem of course. >=20 > > + }; > > +}; > > diff --git a/arch/arm64/boot/dts/airoha/en7581.dtsi b/arch/arm64/boot/d= ts/airoha/en7581.dtsi > > new file mode 100644 > > index 000000000000..7a3c0a45c03f > > --- /dev/null > > +++ b/arch/arm64/boot/dts/airoha/en7581.dtsi > > @@ -0,0 +1,137 @@ > > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > + > > +#include > > +#include > > + > > +/ { > > + interrupt-parent =3D <&gic>; > > + #address-cells =3D <2>; > > + #size-cells =3D <2>; > > + > > + reserved-memory { > > + #address-cells =3D <2>; > > + #size-cells =3D <2>; > > + ranges; > > + > > + npu_binary@84000000 { >=20 > npu-binary@... ack, I will fix it. >=20 > > + no-map; > > + reg =3D <0x0 0x84000000 0x0 0xA00000>; > > + }; > > + > > + npu_flag@84B0000 { > > + no-map; > > + reg =3D <0x0 0x84B00000 0x0 0x100000>; > > + }; > > + > > + npu_pkt@85000000 { > > + no-map; > > + reg =3D <0x0 0x85000000 0x0 0x1A00000>; > > + }; > > + > > + npu_phyaddr@86B00000 { > > + no-map; > > + reg =3D <0x0 0x86B00000 0x0 0x100000>; > > + }; > > + > > + npu_rxdesc@86D00000 { > > + no-map; > > + reg =3D <0x0 0x86D00000 0x0 0x100000>; > > + }; > > + }; > > + > > + psci { > > + compatible =3D "arm,psci-0.2"; >=20 > Not the first time I comment that (in general - not specifically to you):= are you > sure that your platform supports PSCI v0.2 and not a later version? >=20 > Please check your kernel log, you should see a message like >=20 > [ 0.000000] psci: PSCIv1.1 detected in firmware. >=20 > (with the right version) >=20 > ...then use the right compatible string :-) ack, I will fix it. >=20 > > + method =3D "smc"; > > + }; > > + > > + cpus { > > + #address-cells =3D <1>; > > + #size-cells =3D <0>; > > + > > + cpu-map { > > + cluster0 { > > + core0 { > > + cpu =3D <&cpu0>; > > + }; > > + core1 { > > + cpu =3D <&cpu1>; > > + }; >=20 > Your cluster contains only two cores, this means that the other two are i= n a > parallel reality? :-P :-P I think this has been copied from vendor sdk. I will fix moving back 2 miss= ing cpu from the 'parallel reality' :) >=20 > Jokes apart, this cpu-map looks wrong. >=20 > Check what the topology is supposed to be for real, clusterized or DynamI= Q? > In the first case, you get X clusters with Y CPUs each - in the second ca= se, > you get *one* single cluster with all CPUs inside. I think it is just a linear architecture, but I will check with airoha folk= s. >=20 > > + }; > > + }; > > + > > + cpu0: cpu@0 { > > + device_type =3D "cpu"; > > + compatible =3D "arm,cortex-a53"; > > + reg =3D <0x0>; > > + enable-method =3D "psci"; > > + clock-frequency =3D <80000000>; > > + next-level-cache =3D <&L2_0>; > > + }; > > + > > + cpu1: cpu@1 { > > + device_type =3D "cpu"; > > + compatible =3D "arm,cortex-a53"; > > + reg =3D <0x1>; > > + enable-method =3D "psci"; > > + clock-frequency =3D <80000000>; > > + next-level-cache =3D <&L2_0>; > > + }; > > + > > + cpu2: cpu@2 { > > + device_type =3D "cpu"; > > + compatible =3D "arm,cortex-a53"; > > + reg =3D <0x2>; > > + enable-method =3D "psci"; > > + clock-frequency =3D <80000000>; > > + next-level-cache =3D <&L2_0>; > > + }; > > + > > + cpu3: cpu@3 { > > + device_type =3D "cpu"; > > + compatible =3D "arm,cortex-a53"; > > + reg =3D <0x3>; > > + enable-method =3D "psci"; > > + clock-frequency =3D <80000000>; > > + next-level-cache =3D <&L2_0>; > > + }; > > + > > + L2_0: l2-cache0 { > > + compatible =3D "cache"; > > + cache-level =3D <2>; > > + cache-unified; >=20 > Do you know what is the l2 cache size, line size, sets? > cache-size =3D < ... > > cache-line-size =3D < ... > > cache-sets =3D < ... > not sure about them, I will sync with airoha folks. >=20 > > + }; > > + }; > > + >=20 > All iospace addressable nodes must go into a soc node, others go in the r= oot node. ack, I will fix it. >=20 > soc { > gic: interrupt-controller@9000000 { > .... > } >=20 > uart0: serial@ .... >=20 > }; >=20 > > + gic: interrupt-controller@9000000 { > > + compatible =3D "arm,gic-v3"; > > + interrupt-controller; > > + #interrupt-cells =3D <3>; > > + #address-cells =3D <1>; > > + #size-cells =3D <1>; > > + reg =3D <0x0 0x09000000 0x0 0x20000>, > > + <0x0 0x09080000 0x0 0x80000>, > > + <0x0 0x09400000 0x0 0x2000>, > > + <0x0 0x09500000 0x0 0x2000>, > > + <0x0 0x09600000 0x0 0x20000>; > > + interrupts =3D ; > > + }; > > + > > + timer { > > + compatible =3D "arm,armv8-timer"; > > + interrupt-parent =3D <&gic>; > > + interrupts =3D , > > + , > > + , > > + ; > > + }; > > + > > + uart1: serial@1fbf0000 { > > + compatible =3D "ns16550"; > > + reg =3D <0x0 0x1fbf0000 0x0 0x30>; > > + reg-io-width =3D <4>; > > + reg-shift =3D <2>; > > + interrupts =3D ; > > + clock-frequency =3D <1843200>; > > + status =3D "okay"; >=20 > status is okay by default, you don't need that. ack, I will fix it. Regards, Lorenzo >=20 > > + }; > > +}; >=20 > Cheers, > Angelo --DbQX4Mk9h2ElNWSu Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTquNwa3Txd3rGGn7Y6cBh0uS2trAUCZdY0kwAKCRA6cBh0uS2t rCMxAP0Vrf4duE+eGDH0GsDTx4rWZXFzK1TJ8BFrmuUCIKjWUwEA3GAoLpHHiXxk buYrGojqAuJHjbO9dZ5XIuiX8Nho7wE= =ACqX -----END PGP SIGNATURE----- --DbQX4Mk9h2ElNWSu-- --===============8389962209950151123== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============8389962209950151123==--