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From: Mostafa Saleh <smostafa@google.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
	linux-arm-kernel@lists.infradead.org,
	Robin Murphy <robin.murphy@arm.com>,
	Will Deacon <will@kernel.org>, Eric Auger <eric.auger@redhat.com>,
	Jean-Philippe Brucker <jean-philippe@linaro.org>,
	Moritz Fischer <mdf@kernel.org>,
	Michael Shavit <mshavit@google.com>,
	Nicolin Chen <nicolinc@nvidia.com>,
	patches@lists.linux.dev,
	Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Subject: Re: [PATCH v5 03/27] iommu/arm-smmu-v3: Add a type for the CD entry
Date: Fri, 22 Mar 2024 17:52:17 +0000	[thread overview]
Message-ID: <Zf3FUestghRLc3XX@google.com> (raw)
In-Reply-To: <3-v5-9a37e0c884ce+31e3-smmuv3_newapi_p2_jgg@nvidia.com>

On Mon, Mar 04, 2024 at 07:43:51PM -0400, Jason Gunthorpe wrote:
> Instead of passing a naked __le16 * around to represent a CD table entry
> wrap it in a "struct arm_smmu_cd" with an array of the correct size. This
> makes it much clearer which functions will comprise the "CD API".
> 
> Tested-by: Nicolin Chen <nicolinc@nvidia.com>
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
> ---
>  drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 20 +++++++++++---------
>  drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h |  7 ++++++-
>  2 files changed, 17 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 9e9233331c4636..c60b067c1f553e 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -1219,7 +1219,8 @@ static void arm_smmu_write_cd_l1_desc(__le64 *dst,
>  	WRITE_ONCE(*dst, cpu_to_le64(val));
>  }
>  
> -static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_master *master, u32 ssid)
> +static struct arm_smmu_cd *arm_smmu_get_cd_ptr(struct arm_smmu_master *master,
> +					       u32 ssid)
>  {
>  	__le64 *l1ptr;
>  	unsigned int idx;
> @@ -1228,7 +1229,8 @@ static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_master *master, u32 ssid)
>  	struct arm_smmu_ctx_desc_cfg *cd_table = &master->cd_table;
>  
>  	if (cd_table->s1fmt == STRTAB_STE_0_S1FMT_LINEAR)
> -		return cd_table->cdtab + ssid * CTXDESC_CD_DWORDS;
> +		return (struct arm_smmu_cd *)(cd_table->cdtab +
> +					      ssid * CTXDESC_CD_DWORDS);
>  
>  	idx = ssid >> CTXDESC_SPLIT;
>  	l1_desc = &cd_table->l1_desc[idx];
> @@ -1242,7 +1244,7 @@ static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_master *master, u32 ssid)
>  		arm_smmu_sync_cd(master, ssid, false);
>  	}
>  	idx = ssid & (CTXDESC_L2_ENTRIES - 1);
> -	return l1_desc->l2ptr + idx * CTXDESC_CD_DWORDS;
> +	return &l1_desc->l2ptr[idx];
>  }
>  
>  int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid,
> @@ -1261,7 +1263,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid,
>  	 */
>  	u64 val;
>  	bool cd_live;
> -	__le64 *cdptr;
> +	struct arm_smmu_cd *cdptr;
>  	struct arm_smmu_ctx_desc_cfg *cd_table = &master->cd_table;
>  	struct arm_smmu_device *smmu = master->smmu;
>  
> @@ -1272,7 +1274,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid,
>  	if (!cdptr)
>  		return -ENOMEM;
>  
> -	val = le64_to_cpu(cdptr[0]);
> +	val = le64_to_cpu(cdptr->data[0]);
>  	cd_live = !!(val & CTXDESC_CD_0_V);
>  
>  	if (!cd) { /* (5) */
> @@ -1289,9 +1291,9 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid,
>  		 * this substream's traffic
>  		 */
>  	} else { /* (1) and (2) */
> -		cdptr[1] = cpu_to_le64(cd->ttbr & CTXDESC_CD_1_TTB0_MASK);
> -		cdptr[2] = 0;
> -		cdptr[3] = cpu_to_le64(cd->mair);
> +		cdptr->data[1] = cpu_to_le64(cd->ttbr & CTXDESC_CD_1_TTB0_MASK);
> +		cdptr->data[2] = 0;
> +		cdptr->data[3] = cpu_to_le64(cd->mair);
>  
>  		/*
>  		 * STE may be live, and the SMMU might read dwords of this CD in any
> @@ -1323,7 +1325,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid,
>  	 *   field within an aligned 64-bit span of a structure can be altered
>  	 *   without first making the structure invalid.
>  	 */
> -	WRITE_ONCE(cdptr[0], cpu_to_le64(val));
> +	WRITE_ONCE(cdptr->data[0], cpu_to_le64(val));
>  	arm_smmu_sync_cd(master, ssid, true);
>  	return 0;
>  }
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> index 23baf117e7e4b5..7078ed569fd4d3 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> @@ -282,6 +282,11 @@ struct arm_smmu_ste {
>  #define CTXDESC_L1_DESC_L2PTR_MASK	GENMASK_ULL(51, 12)
>  
>  #define CTXDESC_CD_DWORDS		8
> +
> +struct arm_smmu_cd {
> +	__le64 data[CTXDESC_CD_DWORDS];
> +};
> +
>  #define CTXDESC_CD_0_TCR_T0SZ		GENMASK_ULL(5, 0)
>  #define CTXDESC_CD_0_TCR_TG0		GENMASK_ULL(7, 6)
>  #define CTXDESC_CD_0_TCR_IRGN0		GENMASK_ULL(9, 8)
> @@ -591,7 +596,7 @@ struct arm_smmu_ctx_desc {
>  };
>  
>  struct arm_smmu_l1_ctx_desc {
> -	__le64				*l2ptr;
> +	struct arm_smmu_cd		*l2ptr;
>  	dma_addr_t			l2ptr_dma;
>  };
>  
> -- 
> 2.43.2
>

Reviewed-by: Mostafa Saleh <smostafa@google.com>

Thanks,
Mostafa

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  parent reply	other threads:[~2024-03-22 17:52 UTC|newest]

Thread overview: 116+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-04 23:43 [PATCH v5 00/27] Update SMMUv3 to the modern iommu API (part 2/3) Jason Gunthorpe
2024-03-04 23:43 ` [PATCH v5 01/27] iommu/arm-smmu-v3: Do not allow a SVA domain to be set on the wrong PASID Jason Gunthorpe
2024-03-15  3:38   ` Nicolin Chen
2024-03-18 18:16     ` Jason Gunthorpe
2024-03-22 17:48   ` Mostafa Saleh
2024-03-26 18:30     ` Jason Gunthorpe
2024-03-26 19:06       ` Mostafa Saleh
2024-03-26 22:10         ` Jason Gunthorpe
2024-03-04 23:43 ` [PATCH v5 02/27] iommu/arm-smmu-v3: Do not ATC invalidate the entire domain Jason Gunthorpe
2024-03-13  9:18   ` Michael Shavit
2024-03-15  2:24   ` Nicolin Chen
2024-03-16 18:09   ` Moritz Fischer
2024-03-22 17:51   ` Mostafa Saleh
2024-03-04 23:43 ` [PATCH v5 03/27] iommu/arm-smmu-v3: Add a type for the CD entry Jason Gunthorpe
2024-03-13  9:44   ` Michael Shavit
2024-03-16 18:10     ` Moritz Fischer
2024-03-18 18:02     ` Jason Gunthorpe
2024-03-15  3:12   ` Nicolin Chen
2024-03-22 17:52   ` Mostafa Saleh [this message]
2024-03-04 23:43 ` [PATCH v5 04/27] iommu/arm-smmu-v3: Add an ops indirection to the STE code Jason Gunthorpe
2024-03-13 11:30   ` Michael Shavit
2024-03-15  4:22   ` Nicolin Chen
2024-03-15  5:20     ` Nicolin Chen
2024-03-18 18:06     ` Jason Gunthorpe
2024-03-22 18:14   ` Mostafa Saleh
2024-03-25 14:11     ` Jason Gunthorpe
2024-03-25 21:01       ` Mostafa Saleh
2024-03-04 23:43 ` [PATCH v5 05/27] iommu/arm-smmu-v3: Make CD programming use arm_smmu_write_entry() Jason Gunthorpe
2024-03-15  7:52   ` Nicolin Chen
2024-03-20 12:46     ` Jason Gunthorpe
2024-03-16 18:14   ` Moritz Fischer
2024-03-23 13:02   ` Mostafa Saleh
2024-03-25 14:25     ` Jason Gunthorpe
2024-03-26 18:30     ` Jason Gunthorpe
2024-03-26 19:12       ` Mostafa Saleh
2024-03-26 22:27         ` Jason Gunthorpe
2024-03-27  9:45           ` Mostafa Saleh
2024-03-27 16:42             ` Jason Gunthorpe
2024-03-04 23:43 ` [PATCH v5 06/27] iommu/arm-smmu-v3: Consolidate clearing a CD table entry Jason Gunthorpe
2024-03-13 11:57   ` Michael Shavit
2024-03-15  6:17   ` Nicolin Chen
2024-03-16 18:15   ` Moritz Fischer
2024-03-22 18:36   ` Mostafa Saleh
2024-03-25 14:14     ` Jason Gunthorpe
2024-03-25 21:02       ` Mostafa Saleh
2024-03-04 23:43 ` [PATCH v5 07/27] iommu/arm-smmu-v3: Move the CD generation for S1 domains into a function Jason Gunthorpe
2024-03-13 12:13   ` Michael Shavit
2024-03-18 18:11     ` Jason Gunthorpe
2024-03-23 13:11   ` Mostafa Saleh
2024-03-25 14:30     ` Jason Gunthorpe
2024-03-04 23:43 ` [PATCH v5 08/27] iommu/arm-smmu-v3: Move allocation of the cdtable into arm_smmu_get_cd_ptr() Jason Gunthorpe
2024-03-13 12:15   ` Michael Shavit
2024-03-16  3:31   ` Nicolin Chen
2024-03-22 19:07   ` Mostafa Saleh
2024-03-25 14:21     ` Jason Gunthorpe
2024-03-25 21:03       ` Mostafa Saleh
2024-03-04 23:43 ` [PATCH v5 09/27] iommu/arm-smmu-v3: Allocate the CD table entry in advance Jason Gunthorpe
2024-03-13 12:17   ` Michael Shavit
2024-03-16  4:16   ` Nicolin Chen
2024-03-18 18:14     ` Jason Gunthorpe
2024-03-22 19:15   ` Mostafa Saleh
2024-03-04 23:43 ` [PATCH v5 10/27] iommu/arm-smmu-v3: Move the CD generation for SVA into a function Jason Gunthorpe
2024-03-16  5:19   ` Nicolin Chen
2024-03-20 13:09     ` Jason Gunthorpe
2024-03-04 23:43 ` [PATCH v5 11/27] iommu/arm-smmu-v3: Build the whole CD in arm_smmu_make_s1_cd() Jason Gunthorpe
2024-03-15 10:04   ` Michael Shavit
2024-03-20 12:50     ` Jason Gunthorpe
2024-03-23 13:20   ` Mostafa Saleh
2024-03-04 23:44 ` [PATCH v5 12/27] iommu/arm-smmu-v3: Start building a generic PASID layer Jason Gunthorpe
2024-03-19 16:11   ` Michael Shavit
2024-03-20 18:32     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 13/27] iommu/arm-smmu-v3: Make smmu_domain->devices into an allocated list Jason Gunthorpe
2024-03-19 13:09   ` Michael Shavit
2024-03-04 23:44 ` [PATCH v5 14/27] iommu/arm-smmu-v3: Make changing domains be hitless for ATS Jason Gunthorpe
2024-03-21 12:26   ` Michael Shavit
2024-03-21 13:28     ` Jason Gunthorpe
2024-03-21 14:53       ` Michael Shavit
2024-03-21 14:57         ` Michael Shavit
2024-03-21 17:32         ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 15/27] iommu/arm-smmu-v3: Add ssid to struct arm_smmu_master_domain Jason Gunthorpe
2024-03-19 13:31   ` Michael Shavit
2024-03-20 12:53     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 16/27] iommu/arm-smmu-v3: Keep track of valid CD entries in the cd_table Jason Gunthorpe
2024-03-19 13:55   ` Michael Shavit
2024-03-20 18:21     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 17/27] iommu/arm-smmu-v3: Thread SSID through the arm_smmu_attach_*() interface Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 18/27] iommu/arm-smmu-v3: Make SVA allocate a normal arm_smmu_domain Jason Gunthorpe
2024-03-19 14:52   ` Michael Shavit
2024-03-20 23:20     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 19/27] iommu/arm-smmu-v3: Keep track of arm_smmu_master_domain for SVA Jason Gunthorpe
2024-03-21 10:47   ` Michael Shavit
2024-03-21 13:55     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 20/27] iommu: Add ops->domain_alloc_sva() Jason Gunthorpe
2024-03-19 15:09   ` Michael Shavit
2024-03-04 23:44 ` [PATCH v5 21/27] iommu/arm-smmu-v3: Put the SVA mmu notifier in the smmu_domain Jason Gunthorpe
2024-03-19 16:23   ` Michael Shavit
2024-03-20 18:35     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 22/27] iommu/arm-smmu-v3: Consolidate freeing the ASID/VMID Jason Gunthorpe
2024-03-19 16:44   ` Michael Shavit
2024-03-19 18:37     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 23/27] iommu/arm-smmu-v3: Move the arm_smmu_asid_xa to per-smmu like vmid Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 24/27] iommu/arm-smmu-v3: Bring back SVA BTM support Jason Gunthorpe
2024-03-19 17:07   ` Michael Shavit
2024-03-20 13:05     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 25/27] iommu/arm-smmu-v3: Allow IDENTITY/BLOCKED to be set while PASID is used Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 26/27] iommu/arm-smmu-v3: Allow a PASID to be set when RID is IDENTITY/BLOCKED Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 27/27] iommu/arm-smmu-v3: Allow setting a S1 domain to a PASID Jason Gunthorpe
2024-03-15 10:40 ` [PATCH v5 00/27] Update SMMUv3 to the modern iommu API (part 2/3) Shameerali Kolothum Thodi
2024-03-23 13:38 ` Mostafa Saleh
2024-03-25 14:35   ` Jason Gunthorpe
2024-03-25 21:06     ` Mostafa Saleh
2024-03-25 22:44       ` Jason Gunthorpe
2024-03-25 10:22 ` Mostafa Saleh
2024-03-25 10:44   ` Shameerali Kolothum Thodi
2024-03-25 11:22     ` Mostafa Saleh
2024-03-25 16:47       ` Jason Gunthorpe

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