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[34.76.131.216]) by smtp.gmail.com with ESMTPSA id t21-20020a05600c451500b004146e58cc35sm141612wmo.46.2024.03.22.10.52.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Mar 2024 10:52:21 -0700 (PDT) Date: Fri, 22 Mar 2024 17:52:17 +0000 From: Mostafa Saleh To: Jason Gunthorpe Cc: iommu@lists.linux.dev, Joerg Roedel , linux-arm-kernel@lists.infradead.org, Robin Murphy , Will Deacon , Eric Auger , Jean-Philippe Brucker , Moritz Fischer , Michael Shavit , Nicolin Chen , patches@lists.linux.dev, Shameerali Kolothum Thodi Subject: Re: [PATCH v5 03/27] iommu/arm-smmu-v3: Add a type for the CD entry Message-ID: References: <0-v5-9a37e0c884ce+31e3-smmuv3_newapi_p2_jgg@nvidia.com> <3-v5-9a37e0c884ce+31e3-smmuv3_newapi_p2_jgg@nvidia.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <3-v5-9a37e0c884ce+31e3-smmuv3_newapi_p2_jgg@nvidia.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240322_105227_524600_C36E92C8 X-CRM114-Status: GOOD ( 22.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Mar 04, 2024 at 07:43:51PM -0400, Jason Gunthorpe wrote: > Instead of passing a naked __le16 * around to represent a CD table entry > wrap it in a "struct arm_smmu_cd" with an array of the correct size. This > makes it much clearer which functions will comprise the "CD API". > > Tested-by: Nicolin Chen > Signed-off-by: Jason Gunthorpe > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 20 +++++++++++--------- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 7 ++++++- > 2 files changed, 17 insertions(+), 10 deletions(-) > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index 9e9233331c4636..c60b067c1f553e 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -1219,7 +1219,8 @@ static void arm_smmu_write_cd_l1_desc(__le64 *dst, > WRITE_ONCE(*dst, cpu_to_le64(val)); > } > > -static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_master *master, u32 ssid) > +static struct arm_smmu_cd *arm_smmu_get_cd_ptr(struct arm_smmu_master *master, > + u32 ssid) > { > __le64 *l1ptr; > unsigned int idx; > @@ -1228,7 +1229,8 @@ static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_master *master, u32 ssid) > struct arm_smmu_ctx_desc_cfg *cd_table = &master->cd_table; > > if (cd_table->s1fmt == STRTAB_STE_0_S1FMT_LINEAR) > - return cd_table->cdtab + ssid * CTXDESC_CD_DWORDS; > + return (struct arm_smmu_cd *)(cd_table->cdtab + > + ssid * CTXDESC_CD_DWORDS); > > idx = ssid >> CTXDESC_SPLIT; > l1_desc = &cd_table->l1_desc[idx]; > @@ -1242,7 +1244,7 @@ static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_master *master, u32 ssid) > arm_smmu_sync_cd(master, ssid, false); > } > idx = ssid & (CTXDESC_L2_ENTRIES - 1); > - return l1_desc->l2ptr + idx * CTXDESC_CD_DWORDS; > + return &l1_desc->l2ptr[idx]; > } > > int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid, > @@ -1261,7 +1263,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid, > */ > u64 val; > bool cd_live; > - __le64 *cdptr; > + struct arm_smmu_cd *cdptr; > struct arm_smmu_ctx_desc_cfg *cd_table = &master->cd_table; > struct arm_smmu_device *smmu = master->smmu; > > @@ -1272,7 +1274,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid, > if (!cdptr) > return -ENOMEM; > > - val = le64_to_cpu(cdptr[0]); > + val = le64_to_cpu(cdptr->data[0]); > cd_live = !!(val & CTXDESC_CD_0_V); > > if (!cd) { /* (5) */ > @@ -1289,9 +1291,9 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid, > * this substream's traffic > */ > } else { /* (1) and (2) */ > - cdptr[1] = cpu_to_le64(cd->ttbr & CTXDESC_CD_1_TTB0_MASK); > - cdptr[2] = 0; > - cdptr[3] = cpu_to_le64(cd->mair); > + cdptr->data[1] = cpu_to_le64(cd->ttbr & CTXDESC_CD_1_TTB0_MASK); > + cdptr->data[2] = 0; > + cdptr->data[3] = cpu_to_le64(cd->mair); > > /* > * STE may be live, and the SMMU might read dwords of this CD in any > @@ -1323,7 +1325,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid, > * field within an aligned 64-bit span of a structure can be altered > * without first making the structure invalid. > */ > - WRITE_ONCE(cdptr[0], cpu_to_le64(val)); > + WRITE_ONCE(cdptr->data[0], cpu_to_le64(val)); > arm_smmu_sync_cd(master, ssid, true); > return 0; > } > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > index 23baf117e7e4b5..7078ed569fd4d3 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > @@ -282,6 +282,11 @@ struct arm_smmu_ste { > #define CTXDESC_L1_DESC_L2PTR_MASK GENMASK_ULL(51, 12) > > #define CTXDESC_CD_DWORDS 8 > + > +struct arm_smmu_cd { > + __le64 data[CTXDESC_CD_DWORDS]; > +}; > + > #define CTXDESC_CD_0_TCR_T0SZ GENMASK_ULL(5, 0) > #define CTXDESC_CD_0_TCR_TG0 GENMASK_ULL(7, 6) > #define CTXDESC_CD_0_TCR_IRGN0 GENMASK_ULL(9, 8) > @@ -591,7 +596,7 @@ struct arm_smmu_ctx_desc { > }; > > struct arm_smmu_l1_ctx_desc { > - __le64 *l2ptr; > + struct arm_smmu_cd *l2ptr; > dma_addr_t l2ptr_dma; > }; > > -- > 2.43.2 > Reviewed-by: Mostafa Saleh Thanks, Mostafa _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel