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From: Mostafa Saleh <smostafa@google.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
	linux-arm-kernel@lists.infradead.org,
	Robin Murphy <robin.murphy@arm.com>,
	Will Deacon <will@kernel.org>, Eric Auger <eric.auger@redhat.com>,
	Jean-Philippe Brucker <jean-philippe@linaro.org>,
	Moritz Fischer <mdf@kernel.org>,
	Michael Shavit <mshavit@google.com>,
	Nicolin Chen <nicolinc@nvidia.com>,
	patches@lists.linux.dev,
	Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Subject: Re: [PATCH v5 04/27] iommu/arm-smmu-v3: Add an ops indirection to the STE code
Date: Mon, 25 Mar 2024 21:01:13 +0000	[thread overview]
Message-ID: <ZgHmGbZ4mSrbhUI3@google.com> (raw)
In-Reply-To: <20240325141132.GA110546@nvidia.com>

On Mon, Mar 25, 2024 at 11:11:32AM -0300, Jason Gunthorpe wrote:
> On Fri, Mar 22, 2024 at 06:14:24PM +0000, Mostafa Saleh wrote:
> > > @@ -1027,57 +1038,55 @@ static void arm_smmu_get_ste_used(const struct arm_smmu_ste *ent,
> > >   * unused_update is an intermediate value of entry that has unused bits set to
> > >   * their new values.
> > >   */
> > > -static u8 arm_smmu_entry_qword_diff(const struct arm_smmu_ste *entry,
> > > -				    const struct arm_smmu_ste *target,
> > > -				    struct arm_smmu_ste *unused_update)
> > > +static u8 arm_smmu_entry_qword_diff(struct arm_smmu_entry_writer *writer,
> > > +				    const __le64 *entry, const __le64 *target,
> > > +				    __le64 *unused_update)
> > >  {
> > > -	struct arm_smmu_ste target_used = {};
> > > -	struct arm_smmu_ste cur_used = {};
> > > +	__le64 target_used[NUM_ENTRY_QWORDS] = {};
> > > +	__le64 cur_used[NUM_ENTRY_QWORDS] = {};
> > This is confusing to me, the function was modified to be generic, so its has
> > args are __le64 * instead of struct arm_smmu_ste *.
> 
> Right
> 
> > But NUM_ENTRY_QWORDS is defined as “(sizeof(struct arm_smmu_ste) / sizeof(u64))”
> > and in the same function writer->ops->num_entry_qwords is used
> > nterchangeably,
> 
> Right
> 
> > I understand that this not a constant and the compiler would complain.
> > But since for any other num_entry_qwords larger than NUM_ENTRY_QWORDS it fails,
> > and we know STEs and CDs both have the same size, we simplify the code and make
> > it a constant everywhere.
> 
> So you say to get rid of num_entry_qwords and just use the constant?

In my opinion, yes, that looks easier to understand, and avoids the MAX
stuff as there is no reason for the extra generalisation.

> > I see in the next patch, that this is redefined to be the max between STE and
> > CD, but again, this hardware and it never changes, so my opinion is to simplify
> > the code, as there is no need to generalize this part.
> 
> Yes, we need a constant.
> 
> It would look like this, it is a little bit simpler:
> 
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index a54062faccde38..d015f41900d802 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -63,9 +63,9 @@ enum arm_smmu_msi_index {
>  	ARM_SMMU_MAX_MSIS,
>  };
>  
> -#define NUM_ENTRY_QWORDS                                                \
> -	(max(sizeof(struct arm_smmu_ste), sizeof(struct arm_smmu_cd)) / \
> -	 sizeof(u64))
> +#define NUM_ENTRY_QWORDS 8
> +static_assert(sizeof(struct arm_smmu_ste) == NUM_ENTRY_QWORDS * sizeof(u64));
> +static_assert(sizeof(struct arm_smmu_cd) == NUM_ENTRY_QWORDS * sizeof(u64));
>  
>  static phys_addr_t arm_smmu_msi_cfg[ARM_SMMU_MAX_MSIS][3] = {
>  	[EVTQ_MSI_INDEX] = {
> @@ -1045,7 +1045,7 @@ static u8 arm_smmu_entry_qword_diff(struct arm_smmu_entry_writer *writer,
>  	writer->ops->get_used(entry, cur_used);
>  	writer->ops->get_used(target, target_used);
>  
> -	for (i = 0; i != writer->ops->num_entry_qwords; i++) {
> +	for (i = 0; i != NUM_ENTRY_QWORDS; i++) {
>  		/*
>  		 * Check that masks are up to date, the make functions are not
>  		 * allowed to set a bit to 1 if the used function doesn't say it
> @@ -1114,7 +1114,6 @@ static bool entry_set(struct arm_smmu_entry_writer *writer, __le64 *entry,
>  void arm_smmu_write_entry(struct arm_smmu_entry_writer *writer, __le64 *entry,
>  			  const __le64 *target)
>  {
> -	unsigned int num_entry_qwords = writer->ops->num_entry_qwords;
>  	__le64 unused_update[NUM_ENTRY_QWORDS];
>  	u8 used_qword_diff;
>  
> @@ -1137,9 +1136,9 @@ void arm_smmu_write_entry(struct arm_smmu_entry_writer *writer, __le64 *entry,
>  		 */
>  		unused_update[critical_qword_index] =
>  			entry[critical_qword_index];
> -		entry_set(writer, entry, unused_update, 0, num_entry_qwords);
> +		entry_set(writer, entry, unused_update, 0, NUM_ENTRY_QWORDS);
>  		entry_set(writer, entry, target, critical_qword_index, 1);
> -		entry_set(writer, entry, target, 0, num_entry_qwords);
> +		entry_set(writer, entry, target, 0, NUM_ENTRY_QWORDS);
>  	} else if (used_qword_diff) {
>  		/*
>  		 * At least two qwords need their inuse bits to be changed. This
> @@ -1148,7 +1147,7 @@ void arm_smmu_write_entry(struct arm_smmu_entry_writer *writer, __le64 *entry,
>  		 */
>  		unused_update[0] = entry[0] & (~writer->ops->v_bit);
>  		entry_set(writer, entry, unused_update, 0, 1);
> -		entry_set(writer, entry, target, 1, num_entry_qwords - 1);
> +		entry_set(writer, entry, target, 1, NUM_ENTRY_QWORDS - 1);
>  		entry_set(writer, entry, target, 0, 1);
>  	} else {
>  		/*
> @@ -1157,7 +1156,7 @@ void arm_smmu_write_entry(struct arm_smmu_entry_writer *writer, __le64 *entry,
>  		 * compute_qword_diff().
>  		 */
>  		WARN_ON_ONCE(
> -			entry_set(writer, entry, target, 0, num_entry_qwords));
> +			entry_set(writer, entry, target, 0, NUM_ENTRY_QWORDS));
>  	}
>  }
>  
> @@ -1272,7 +1271,6 @@ static const struct arm_smmu_entry_writer_ops arm_smmu_cd_writer_ops = {
>  	.sync = arm_smmu_cd_writer_sync_entry,
>  	.get_used = arm_smmu_get_cd_used,
>  	.v_bit = cpu_to_le64(CTXDESC_CD_0_V),
> -	.num_entry_qwords = sizeof(struct arm_smmu_cd) / sizeof(u64),
>  };
>  
>  void arm_smmu_write_cd_entry(struct arm_smmu_master *master, int ssid,
> @@ -1460,7 +1458,6 @@ static const struct arm_smmu_entry_writer_ops arm_smmu_ste_writer_ops = {
>  	.sync = arm_smmu_ste_writer_sync_entry,
>  	.get_used = arm_smmu_get_ste_used,
>  	.v_bit = cpu_to_le64(STRTAB_STE_0_V),
> -	.num_entry_qwords = sizeof(struct arm_smmu_ste) / sizeof(u64),
>  };
>  
>  static void arm_smmu_write_ste(struct arm_smmu_master *master, u32 sid,
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> index 8ba07b00bf6056..5936dc5f76786a 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> @@ -779,7 +779,6 @@ struct arm_smmu_entry_writer {
>  };
>  
>  struct arm_smmu_entry_writer_ops {
> -	unsigned int num_entry_qwords;
>  	__le64 v_bit;
>  	void (*get_used)(const __le64 *entry, __le64 *used);
>  	void (*sync)(struct arm_smmu_entry_writer *writer);
> 

Thanks,
Mostafa

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  reply	other threads:[~2024-03-25 21:01 UTC|newest]

Thread overview: 116+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-04 23:43 [PATCH v5 00/27] Update SMMUv3 to the modern iommu API (part 2/3) Jason Gunthorpe
2024-03-04 23:43 ` [PATCH v5 01/27] iommu/arm-smmu-v3: Do not allow a SVA domain to be set on the wrong PASID Jason Gunthorpe
2024-03-15  3:38   ` Nicolin Chen
2024-03-18 18:16     ` Jason Gunthorpe
2024-03-22 17:48   ` Mostafa Saleh
2024-03-26 18:30     ` Jason Gunthorpe
2024-03-26 19:06       ` Mostafa Saleh
2024-03-26 22:10         ` Jason Gunthorpe
2024-03-04 23:43 ` [PATCH v5 02/27] iommu/arm-smmu-v3: Do not ATC invalidate the entire domain Jason Gunthorpe
2024-03-13  9:18   ` Michael Shavit
2024-03-15  2:24   ` Nicolin Chen
2024-03-16 18:09   ` Moritz Fischer
2024-03-22 17:51   ` Mostafa Saleh
2024-03-04 23:43 ` [PATCH v5 03/27] iommu/arm-smmu-v3: Add a type for the CD entry Jason Gunthorpe
2024-03-13  9:44   ` Michael Shavit
2024-03-16 18:10     ` Moritz Fischer
2024-03-18 18:02     ` Jason Gunthorpe
2024-03-15  3:12   ` Nicolin Chen
2024-03-22 17:52   ` Mostafa Saleh
2024-03-04 23:43 ` [PATCH v5 04/27] iommu/arm-smmu-v3: Add an ops indirection to the STE code Jason Gunthorpe
2024-03-13 11:30   ` Michael Shavit
2024-03-15  4:22   ` Nicolin Chen
2024-03-15  5:20     ` Nicolin Chen
2024-03-18 18:06     ` Jason Gunthorpe
2024-03-22 18:14   ` Mostafa Saleh
2024-03-25 14:11     ` Jason Gunthorpe
2024-03-25 21:01       ` Mostafa Saleh [this message]
2024-03-04 23:43 ` [PATCH v5 05/27] iommu/arm-smmu-v3: Make CD programming use arm_smmu_write_entry() Jason Gunthorpe
2024-03-15  7:52   ` Nicolin Chen
2024-03-20 12:46     ` Jason Gunthorpe
2024-03-16 18:14   ` Moritz Fischer
2024-03-23 13:02   ` Mostafa Saleh
2024-03-25 14:25     ` Jason Gunthorpe
2024-03-26 18:30     ` Jason Gunthorpe
2024-03-26 19:12       ` Mostafa Saleh
2024-03-26 22:27         ` Jason Gunthorpe
2024-03-27  9:45           ` Mostafa Saleh
2024-03-27 16:42             ` Jason Gunthorpe
2024-03-04 23:43 ` [PATCH v5 06/27] iommu/arm-smmu-v3: Consolidate clearing a CD table entry Jason Gunthorpe
2024-03-13 11:57   ` Michael Shavit
2024-03-15  6:17   ` Nicolin Chen
2024-03-16 18:15   ` Moritz Fischer
2024-03-22 18:36   ` Mostafa Saleh
2024-03-25 14:14     ` Jason Gunthorpe
2024-03-25 21:02       ` Mostafa Saleh
2024-03-04 23:43 ` [PATCH v5 07/27] iommu/arm-smmu-v3: Move the CD generation for S1 domains into a function Jason Gunthorpe
2024-03-13 12:13   ` Michael Shavit
2024-03-18 18:11     ` Jason Gunthorpe
2024-03-23 13:11   ` Mostafa Saleh
2024-03-25 14:30     ` Jason Gunthorpe
2024-03-04 23:43 ` [PATCH v5 08/27] iommu/arm-smmu-v3: Move allocation of the cdtable into arm_smmu_get_cd_ptr() Jason Gunthorpe
2024-03-13 12:15   ` Michael Shavit
2024-03-16  3:31   ` Nicolin Chen
2024-03-22 19:07   ` Mostafa Saleh
2024-03-25 14:21     ` Jason Gunthorpe
2024-03-25 21:03       ` Mostafa Saleh
2024-03-04 23:43 ` [PATCH v5 09/27] iommu/arm-smmu-v3: Allocate the CD table entry in advance Jason Gunthorpe
2024-03-13 12:17   ` Michael Shavit
2024-03-16  4:16   ` Nicolin Chen
2024-03-18 18:14     ` Jason Gunthorpe
2024-03-22 19:15   ` Mostafa Saleh
2024-03-04 23:43 ` [PATCH v5 10/27] iommu/arm-smmu-v3: Move the CD generation for SVA into a function Jason Gunthorpe
2024-03-16  5:19   ` Nicolin Chen
2024-03-20 13:09     ` Jason Gunthorpe
2024-03-04 23:43 ` [PATCH v5 11/27] iommu/arm-smmu-v3: Build the whole CD in arm_smmu_make_s1_cd() Jason Gunthorpe
2024-03-15 10:04   ` Michael Shavit
2024-03-20 12:50     ` Jason Gunthorpe
2024-03-23 13:20   ` Mostafa Saleh
2024-03-04 23:44 ` [PATCH v5 12/27] iommu/arm-smmu-v3: Start building a generic PASID layer Jason Gunthorpe
2024-03-19 16:11   ` Michael Shavit
2024-03-20 18:32     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 13/27] iommu/arm-smmu-v3: Make smmu_domain->devices into an allocated list Jason Gunthorpe
2024-03-19 13:09   ` Michael Shavit
2024-03-04 23:44 ` [PATCH v5 14/27] iommu/arm-smmu-v3: Make changing domains be hitless for ATS Jason Gunthorpe
2024-03-21 12:26   ` Michael Shavit
2024-03-21 13:28     ` Jason Gunthorpe
2024-03-21 14:53       ` Michael Shavit
2024-03-21 14:57         ` Michael Shavit
2024-03-21 17:32         ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 15/27] iommu/arm-smmu-v3: Add ssid to struct arm_smmu_master_domain Jason Gunthorpe
2024-03-19 13:31   ` Michael Shavit
2024-03-20 12:53     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 16/27] iommu/arm-smmu-v3: Keep track of valid CD entries in the cd_table Jason Gunthorpe
2024-03-19 13:55   ` Michael Shavit
2024-03-20 18:21     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 17/27] iommu/arm-smmu-v3: Thread SSID through the arm_smmu_attach_*() interface Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 18/27] iommu/arm-smmu-v3: Make SVA allocate a normal arm_smmu_domain Jason Gunthorpe
2024-03-19 14:52   ` Michael Shavit
2024-03-20 23:20     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 19/27] iommu/arm-smmu-v3: Keep track of arm_smmu_master_domain for SVA Jason Gunthorpe
2024-03-21 10:47   ` Michael Shavit
2024-03-21 13:55     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 20/27] iommu: Add ops->domain_alloc_sva() Jason Gunthorpe
2024-03-19 15:09   ` Michael Shavit
2024-03-04 23:44 ` [PATCH v5 21/27] iommu/arm-smmu-v3: Put the SVA mmu notifier in the smmu_domain Jason Gunthorpe
2024-03-19 16:23   ` Michael Shavit
2024-03-20 18:35     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 22/27] iommu/arm-smmu-v3: Consolidate freeing the ASID/VMID Jason Gunthorpe
2024-03-19 16:44   ` Michael Shavit
2024-03-19 18:37     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 23/27] iommu/arm-smmu-v3: Move the arm_smmu_asid_xa to per-smmu like vmid Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 24/27] iommu/arm-smmu-v3: Bring back SVA BTM support Jason Gunthorpe
2024-03-19 17:07   ` Michael Shavit
2024-03-20 13:05     ` Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 25/27] iommu/arm-smmu-v3: Allow IDENTITY/BLOCKED to be set while PASID is used Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 26/27] iommu/arm-smmu-v3: Allow a PASID to be set when RID is IDENTITY/BLOCKED Jason Gunthorpe
2024-03-04 23:44 ` [PATCH v5 27/27] iommu/arm-smmu-v3: Allow setting a S1 domain to a PASID Jason Gunthorpe
2024-03-15 10:40 ` [PATCH v5 00/27] Update SMMUv3 to the modern iommu API (part 2/3) Shameerali Kolothum Thodi
2024-03-23 13:38 ` Mostafa Saleh
2024-03-25 14:35   ` Jason Gunthorpe
2024-03-25 21:06     ` Mostafa Saleh
2024-03-25 22:44       ` Jason Gunthorpe
2024-03-25 10:22 ` Mostafa Saleh
2024-03-25 10:44   ` Shameerali Kolothum Thodi
2024-03-25 11:22     ` Mostafa Saleh
2024-03-25 16:47       ` Jason Gunthorpe

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