From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8065DC47DD9 for ; Wed, 27 Mar 2024 12:01:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=gZWZL0elXVUtgZu7YpK7WhMXP9enxET+iVB1Qr++7CA=; b=LQuGfXnT4K79m7 OXImsdQT2oAg7GiRRc6i7ak+y0wfj2uT0sMo066exmqI/5PhvehyltREaBJs1T7FNGbppl/93GS6V fEHIZldovXhInz6CNDrvBudbeCGF0BGk0h8egmZ1IHRcIIWNu6qSpOu2Zqw9Ni0Y4b+PW8WlUKXl6 GcFIyDMOVKJG8/BhI9I7+v7E3q/vrSuJMIOSL788aLRnwxHyH4h1wxdggsYFvNQCe2wmrtQwCTjAB NFPSovusHo6bzlCqqf8eK8yzON3FNIfMaGI/EqS6gRxnkVfgY+E5xxaZf/0V9Sc8o/ldmltAZQU7A nB0my+m8QqDsorQ+1/oQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rpRyH-00000008hol-2ydH; Wed, 27 Mar 2024 12:01:33 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rpRyE-00000008hoL-3rwX for linux-arm-kernel@lists.infradead.org; Wed, 27 Mar 2024 12:01:32 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B30882F4; Wed, 27 Mar 2024 05:02:00 -0700 (PDT) Received: from bogus (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D02733F694; Wed, 27 Mar 2024 05:01:23 -0700 (PDT) Date: Wed, 27 Mar 2024 12:01:21 +0000 From: Sudeep Holla To: Andre Przywara Cc: Samuel Holland , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Sudeep Holla , Brandon Cheo Fusi , Martin Botka , Martin Botka , Chris Morgan , Ryan Walklin , Mark Rutland , Lorenzo Pieralisi , Yangtao Li , Viresh Kumar , Nishanth Menon , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , "Rafael J . Wysocki" Subject: Re: [PATCH v3 6/8] cpufreq: sun50i: Add H616 support Message-ID: References: <20240326114743.712167-1-andre.przywara@arm.com> <20240326114743.712167-7-andre.przywara@arm.com> <65e86555-761e-4e26-8778-e2452876b5e4@sholland.org> <20240327114608.2ffca28e@minigeek.lan> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240327_050131_070380_D630F23C X-CRM114-Status: GOOD ( 34.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Mar 27, 2024 at 11:58:12AM +0000, Sudeep Holla wrote: > On Wed, Mar 27, 2024 at 11:46:08AM +0000, Andre Przywara wrote: > > On Tue, 26 Mar 2024 22:46:27 -0500 > > Samuel Holland wrote: > > > > Hi Samuel, > > > > > On 3/26/24 06:47, Andre Przywara wrote: > > > > From: Martin Botka > > > > > > > > The Allwinner H616/H618 SoCs have different OPP tables per SoC version > > > > and die revision. The SoC version is stored in NVMEM, as before, though > > > > encoded differently. The die revision is in a different register, in the > > > > SRAM controller. Firmware already exports that value in a standardised > > > > way, through the SMCCC SoCID mechanism. We need both values, as some chips > > > > have the same SoC version, but they don't support the same frequencies and > > > > they get differentiated by the die revision. > > > > > > > > Add the new compatible string and tie the new translation function to > > > > it. This mechanism not only covers the original H616 SoC, but also its > > > > very close sibling SoCs H618 and H700, so add them to the list as well. > > > > > > > > Signed-off-by: Martin Botka > > > > Signed-off-by: Andre Przywara > > > > --- > > > > drivers/cpufreq/sun50i-cpufreq-nvmem.c | 61 ++++++++++++++++++++++++++ > > > > 1 file changed, 61 insertions(+) > > > > > > > > diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c > > > > index bd170611c7906..f9e9fc340f848 100644 > > > > --- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c > > > > +++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c > > > > @@ -10,6 +10,7 @@ > > > > > > > > #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt > > > > > > > > +#include > > > > #include > > > > #include > > > > #include > > > > @@ -46,14 +47,71 @@ static u32 sun50i_h6_efuse_xlate(u32 speedbin) > > > > return 0; > > > > } > > > > > > > > +/* > > > > + * Judging by the OPP tables in the vendor BSP, the quality order of the > > > > + * returned speedbin index is 4 -> 0/2 -> 3 -> 1, from worst to best. > > > > + * 0 and 2 seem identical from the OPP tables' point of view. > > > > + */ > > > > +static u32 sun50i_h616_efuse_xlate(u32 speedbin) > > > > +{ > > > > + int ver_bits = arm_smccc_get_soc_id_revision(); > > > > > > This needs a Kconfig dependency on ARM_SMCCC_SOC_ID. > > > > That was my first impulse as well, but it's actually not true: > > ARM_SMCCC_SOC_ID just protects the sysfs export code, not this function > > here. That does just depend on HAVE_ARM_SMCCC_DISCOVERY, which gets > > selected by ARM_GIC_V3, which gets selected by CONFIG_ARM64. So the > > arm64 kernel is safe. > > It is safe to add the dependency explicitly so that if GICV3 decides to drop > it, this won't be affected. Thoughts ? Ignore this as this will block the ARM(32) build of the driver which I suppose is needed as well. -- Regards, Sudeep _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel