From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 57016CD1292 for ; Mon, 8 Apr 2024 18:24:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=++EACoYyo6nFAlAKc95GysZe7oD7tkp0NuVC2iSNmQ4=; b=nrr64Rx58rvhsJ KEJtz4wFDZyO0sVbXA3mIqBH1Cm5nqL/6dsqNYQHlbMQN06T8oH6Hg+VLyyoc1MhAwycz3fG4QHdS dpnb8LJPawvBOXigsnJ2L7quuT5K7d4N5jLGCc9LyOp2BIev8qO6oDTq/1quk64UfxvxDDQzYDg+V D2ERoF2RwYOq+L7CRU9Fd73mxwpk19GBuLRrdRSKbo5i0m7uYYTD5SSz6PFgX/HCqcGa4qSbYV8mG 97uHTU3G2TVRTG3vuJPw7SurmBvYBIG1DGik9ugdYcDhk2HrOx+LAntqVxn5dwbvjhRxa8YNHGD1H uUqr8N7GhrunkC6uNoRQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rttf3-0000000GTmW-4Avp; Mon, 08 Apr 2024 18:24:06 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rttf0-0000000GTlv-0b40 for linux-arm-kernel@lists.infradead.org; Mon, 08 Apr 2024 18:24:03 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1391CDA7; Mon, 8 Apr 2024 11:24:31 -0700 (PDT) Received: from pluto (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A25423F766; Mon, 8 Apr 2024 11:23:58 -0700 (PDT) Date: Mon, 8 Apr 2024 19:23:55 +0100 From: Cristian Marussi To: Stephen Boyd Cc: linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, sudeep.holla@arm.com, james.quinlan@broadcom.com, f.fainelli@gmail.com, vincent.guittot@linaro.org, peng.fan@oss.nxp.com, michal.simek@amd.com, quic_sibis@quicinc.com, quic_nkela@quicinc.com, souvik.chakravarty@arm.com, mturquette@baylibre.com Subject: Re: [PATCH v2 1/5] clk: scmi: Allocate CLK operations dynamically Message-ID: References: <20240325210025.1448717-1-cristian.marussi@arm.com> <20240325210025.1448717-2-cristian.marussi@arm.com> <7027a28723d2597d9f620f4e0e1da97e.sboyd@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <7027a28723d2597d9f620f4e0e1da97e.sboyd@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240408_112402_366197_0F13188C X-CRM114-Status: GOOD ( 35.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, Apr 07, 2024 at 09:38:46PM -0700, Stephen Boyd wrote: > Quoting Cristian Marussi (2024-03-25 14:00:21) > > diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c > > index 8cbe24789c24..d5d369b052bd 100644 > > --- a/drivers/clk/clk-scmi.c > > +++ b/drivers/clk/clk-scmi.c > > @@ -16,6 +16,14 @@ > > #define NOT_ATOMIC false > > #define ATOMIC true > > Hi, thanks for the review. > > +enum scmi_clk_feats { > > + SCMI_CLK_ATOMIC_SUPPORTED, > > + SCMI_CLK_MAX_FEATS > > +}; > > + > > +#define SCMI_MAX_CLK_OPS (1 << SCMI_CLK_MAX_FEATS) > > + > > +static const struct clk_ops *clk_ops_db[SCMI_MAX_CLK_OPS]; > > Can it be 'scmi_clk_ops_db' for some name spacing? > Yes. > > static const struct scmi_clk_proto_ops *scmi_proto_clk_ops; > > > > struct scmi_clk { > > @@ -230,6 +202,106 @@ static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk, > > return ret; > > } > > > > +/** > > + * scmi_clk_ops_alloc() - Alloc and configure clock operations > > + * @dev: A device reference for devres > > + * @feats_key: A bitmap representing the desired clk_ops capabilities. > > Drop the period please because it's not consistent with the previous > argument descriptor. > Ok. > > + * > > + * Allocate and configure a proper set of clock operations depending on the > > + * specifically required SCMI clock features. > > + * > > + * Return: A pointer to the allocated and configured clk_ops on Success, > > Lowercase 'Success'. > Ok. > > + > > +/** > > + * scmi_clk_ops_select() - Select a proper set of clock operations > > + * @sclk: A reference to an SCMI clock descriptor > > + * @atomic_capable: A flag to indicate if atomic mode is supported by the > > + * transport > > + * @atomic_threshold: Platform atomic threshold value > > Is this in nanoseconds, microseconds, or ??? Maybe a better description is > "clk_ops are atomic when clk enable_latency is less than X [time unit]" > It is micro, I will comment better. > > + * > > + * After having built a bitmap descriptor to represent the set of features > > + * needed by this SCMI clock, at first use it to lookup into the set of > > + * previously allocated clk_ops to check if a suitable combination of clock > > + * operations was already created; when no match is found allocate a brand new > > + * set of clk_ops satisfying the required combination of features and save it > > + * for future references. > > + * > > + * In this way only one set of clk_ops is ever created for each different > > + * combination that is effectively needed. > > + * > > + * Return: A pointer to the allocated and configured clk_ops on Success, or > > Lowercase 'Success'. > Ok. > > + * NULL otherwise. > > + */ > > +static const struct clk_ops * > > +scmi_clk_ops_select(struct scmi_clk *sclk, bool atomic_capable, > > + unsigned int atomic_threshold) > > +{ > > + const struct scmi_clock_info *ci = sclk->info; > > + unsigned int feats_key = 0; > > + const struct clk_ops *ops; > > + > > + /* > > + * Note that when transport is atomic but SCMI protocol did not > > + * specify (or support) an enable_latency associated with a > > + * clock, we default to use atomic operations mode. > > + */ > > + if (atomic_capable && ci->enable_latency <= atomic_threshold) > > + feats_key |= BIT(SCMI_CLK_ATOMIC_SUPPORTED); > > + > > Can we have a static_assert() here that makes sure 'feats_key' isn't > larger than the size of clk_ops_db? > > static_assert(ARRAY_SIZE(clk_ops_db) >= feats_key); > Ok. > > + /* Lookup previously allocated ops */ > > + ops = clk_ops_db[feats_key]; > > + if (!ops) { > > + ops = scmi_clk_ops_alloc(sclk->dev, feats_key); > > + if (!ops) > > + return NULL; > > This could be less nested if the first lookup is put in > scmi_clk_ops_alloc() and the store below is folded in. Or an early > return if found. > > ops = clk_ops_db[feats_key]; > if (ops) > return ops; > > /* Didn't find one */ > ops = scmi_clk_ops_alloc(...) > if (!ops) > return NULL; > > clk_ops_db[feats_key] = ops; > return ops; > ok. > > + > > + /* Store new ops combinations */ > > + clk_ops_db[feats_key] = ops; > > + } > > + > > + return ops; > > +} > > + > > static int scmi_clocks_probe(struct scmi_device *sdev) > > { > > int idx, count, err; > > @@ -285,16 +357,10 @@ static int scmi_clocks_probe(struct scmi_device *sdev) > > sclk->ph = ph; > > sclk->dev = dev; > > > > - /* > > - * Note that when transport is atomic but SCMI protocol did not > > - * specify (or support) an enable_latency associated with a > > - * clock, we default to use atomic operations mode. > > - */ > > - if (is_atomic && > > - sclk->info->enable_latency <= atomic_threshold) > > - scmi_ops = &scmi_atomic_clk_ops; > > - else > > - scmi_ops = &scmi_clk_ops; > > + scmi_ops = scmi_clk_ops_select(sclk, is_atomic, > > 'is_atomic' should probably be 'transport_is_atomic' so this reads > easier. > Ok. Thanks, Cristian _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel