From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F276BC67861 for ; Mon, 8 Apr 2024 14:54:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LLxJBuHhicyo5xIZnGj2xNTYsC03pZlLirKLFV0Gh+w=; b=EWVN+sESUs2oo6 u5IP0z+IVpRgcCDhY8Tk1ENdSb8JvEU9sdIbS5UBhA0fcbYtGAvU8NTEbGXfxinhUCPG5npdVGJwo c3bHU55whLjT1F2hR1thHJcOFhdIOpV1i8V8nRQ+aHYTrSd1OwY5WIRMahUN09XkMrwE8zmE4N9wk hqz6s5y2i0x/16e1zApzixzBHVwysExre2C0D4FtLoyWbmPBIzY6noO+jNycjL21LySNNO1FgH//S mXEwd9dpSZpTgCzBNcH3wz9UtW0cq1v5AnPzWtERf13PLbp+v648syU4ZFdrc8OsdgWMIe4th1hPH lceifEIbqDV+xHIshkug==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rtqOQ-0000000FwTY-1Y5J; Mon, 08 Apr 2024 14:54:42 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rtqON-0000000FwSE-2Pig for linux-arm-kernel@lists.infradead.org; Mon, 08 Apr 2024 14:54:41 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 664E4CE1400; Mon, 8 Apr 2024 14:54:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 42448C43390; Mon, 8 Apr 2024 14:54:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1712588069; bh=6nyvPHBNhtt42tmLE/4Kw6HI0hcocSOnFt5NeHT3nEU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=txqodJ7uy/GQaOX8PSTuc64L79RjRCEeCpLVCqNUXEgUhda0jt8vB/kwSiCz62dn7 RIHGvtz08C3PpxT+3F4L639wcylZR8NUXtcS7JeKoFD4LJown+VUItdvdjsW773Xcq Cx5sG81gz+x4s8oHBFczmAM8S3o7YTbm5SfHbP60TLos/P6WvZbOHhpuGbjVF2VNyw /yVX9GAbMnZN3Il23+0TIPH+2dXogL4MuWlWDbBoy4n+oppmO5QX5RyIFoNDgNQfuh Ebf53Bavz1pRUyvJDz8xYBMnpDFl7109se1gckgdoS/zz8EUSVh8LoO2p1ovvzJoVV UlQtAg49UzPFQ== Date: Mon, 8 Apr 2024 16:54:24 +0200 From: Lorenzo Pieralisi To: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, acpica-devel@lists.linux.dev, Mark Rutland , Robin Murphy , "Rafael J. Wysocki" , Fang Xiang , Marc Zyngier , Robert Moore Subject: Re: [PATCH v5 0/1] irqchip/gic-v3: Enable non-coherent GIC designs probing Message-ID: References: <20240123110332.112797-1-lpieralisi@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240408_075440_121696_7948F3FE X-CRM114-Status: GOOD ( 33.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Mar 06, 2024 at 03:43:32PM +0100, Lorenzo Pieralisi wrote: > On Tue, Jan 23, 2024 at 12:03:31PM +0100, Lorenzo Pieralisi wrote: > > This series is v5 of previous series: > > > > v4: https://lore.kernel.org/all/20231227110038.55453-1-lpieralisi@kernel.org > > v3: https://lore.kernel.org/all/20231006125929.48591-1-lpieralisi@kernel.org > > v2: https://lore.kernel.org/all/20230906094139.16032-1-lpieralisi@kernel.org > > v1: https://lore.kernel.org/all/20230905104721.52199-1-lpieralisi@kernel.org > > > > v4 -> v5 > > - ACPICA patches merged for v6.8 > > - Refactored ACPI parsing code according to review > > - Rebased against v6.8-rc1 > > Hi Marc, all, > > this is not an urgent fix (I don't think there is any ACPI platform > affected in the field so it is not even a fix), I am just asking please > what should I do with it, I appreciate it is late in the cycle (and I > know some fixes got merged in -rcX leading up to -rc7 that are > pre-requisite for this patch to work). Hi, just a reminder to ask how to proceed with this patch, I know it is not urgent, just to understand how to handle it please. The related ACPICA changes are already merged in the mainline. Thanks, Lorenzo > Thanks, > Lorenzo > > > v3 -> v4: > > - Dropped patches [1-3], already merged > > - Added Linuxized ACPICA changes accepted upstream > > - Rebased against v6.7-rc3 > > > > v2 -> v3: > > - Added ACPICA temporary changes and ACPI changes to implement > > ECR https://bugzilla.tianocore.org/show_bug.cgi?id=4557 > > - ACPI changes are for testing purposes - subject to ECR code > > first approval > > > > v1 -> v2: > > - Updated DT bindings as per feedback > > - Updated patch[2] to use GIC quirks infrastructure > > > > Original cover letter > > --- > > The GICv3 architecture specifications provide a means for the > > system programmer to set the shareability and cacheability > > attributes the GIC components (redistributors and ITSes) use > > to drive memory transactions. > > > > Albeit the architecture give control over shareability/cacheability > > memory transactions attributes (and barriers), it is allowed to > > connect the GIC interconnect ports to non-coherent memory ports > > on the interconnect, basically tying off shareability/cacheability > > "wires" and de-facto making the redistributors and ITSes non-coherent > > memory observers. > > > > This series aims at starting a discussion over a possible solution > > to this problem, by adding to the GIC device tree bindings the > > standard dma-noncoherent property. The GIC driver uses the property > > to force the redistributors and ITSes shareability attributes to > > non-shareable, which consequently forces the driver to use CMOs > > on GIC memory tables. > > > > On ARM DT DMA is default non-coherent, so the GIC driver can't rely > > on the generic DT dma-coherent/non-coherent property management layer > > (of_dma_is_coherent()) which would default all GIC designs in the field > > as non-coherent; it has to rely on ad-hoc dma-noncoherent property handling. > > > > When a consistent approach is agreed upon for DT an equivalent binding will > > be put forward for ACPI based systems. > > > > Lorenzo Pieralisi (1): > > irqchip/gic-v3: Enable non-coherent redistributors/ITSes ACPI probing > > > > drivers/acpi/processor_core.c | 15 +++++++++++++++ > > drivers/irqchip/irq-gic-v3-its.c | 4 ++++ > > drivers/irqchip/irq-gic-v3.c | 9 +++++++++ > > include/linux/acpi.h | 3 +++ > > 4 files changed, 31 insertions(+) > > > > -- > > 2.34.1 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel