From: Sunil V L <sunilvl@ventanamicro.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
acpica-devel@lists.linux.dev,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Len Brown" <lenb@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Anup Patel" <anup@brainfault.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Robert Moore" <robert.moore@intel.com>,
"Haibo1 Xu" <haibo1.xu@intel.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Andrei Warkentin" <andrei.warkentin@intel.com>,
"Marc Zyngier" <maz@kernel.org>, "Björn Töpel" <bjorn@kernel.org>
Subject: Re: [RFC PATCH v4 03/20] PCI: Make pci_create_root_bus() declare its reliance on MSI domains
Date: Thu, 18 Apr 2024 17:15:53 +0530 [thread overview]
Message-ID: <ZiEH8VF6VhCMnXz1@sunil-laptop> (raw)
In-Reply-To: <Zh/rroBTGTq/Q/FN@sunil-laptop>
Hi Bjorn,
On Wed, Apr 17, 2024 at 09:03:13PM +0530, Sunil V L wrote:
<snip>
>
> I think fundamentally there are two issues here.
>
> 1) MSI domain should have been setup properly when
> pci_register_host_bridge() is called. I see that pci_arch_init() which
> is supposed to get called early calls x86_create_pci_msi_domain().
> pci_register_host_bridge() also calls pci_set_bus_msi_domain() to setup
> the MSI domain which can walk up to host bridge to find. So, not sure
> why PCI_BUS_FLAGS_NO_MSI is getting set. Is there an issue in walking up
> the tree?
>
I think I understand now why this is happening on X86. In X86, even
though x86_create_pci_msi_domain() sets up the MSI domain, it never
informs IRQ framework. Only later in pcibios_device_add(), the device's
MSI domain will be set which is too late for this bridge logic. So, when
pci_set_bus_msi_domain() is called from pci_register_host_bridge(), it
will not get it.
It works in RISC-V (I guess ARM64 as well) because, the irqchip driver
for MSI controller registers using pci_msi_register_fwnode_provider().
But, if we set bridge->msi_domain = true in X86, it will disable MSI
even though it supports MSI which is really bad.
Please correct me if I am wrong with the analysis. If correct, what do
you think the way forward if using CONFIG option is not good? I tried to
register the domain in below commit but I don't feel it is a cleaner way.
https://github.com/vlsunil/linux/commit/d6cf76f10c225c94fffb286b7a3e803a4e37df54
Thanks,
Sunil
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next prev parent reply other threads:[~2024-04-18 11:46 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-15 17:00 [RFC PATCH v4 00/20] RISC-V: ACPI: Add external interrupt controller support Sunil V L
2024-04-15 17:00 ` [RFC PATCH v4 01/20] arm64: PCI: Migrate ACPI related functions to pci-acpi.c Sunil V L
2024-04-15 17:00 ` [RFC PATCH v4 02/20] RISC-V: ACPI: Implement PCI related functionality Sunil V L
2024-04-15 17:00 ` [RFC PATCH v4 03/20] PCI: Make pci_create_root_bus() declare its reliance on MSI domains Sunil V L
2024-04-15 23:15 ` Bjorn Helgaas
2024-04-16 8:24 ` Sunil V L
2024-04-16 20:46 ` Bjorn Helgaas
2024-04-17 15:33 ` Sunil V L
2024-04-18 11:45 ` Sunil V L [this message]
2024-04-15 17:00 ` [RFC PATCH v4 04/20] ACPI: scan.c: Add weak arch specific function to reorder the IRQCHIP probe Sunil V L
2024-04-15 17:00 ` [RFC PATCH v4 05/20] ACPI: RISC-V: Implement arch function to reorder irqchip probe entries Sunil V L
2024-04-15 17:00 ` [RFC PATCH v4 06/20] ACPI: bus: Add acpi_riscv_init function Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 07/20] RISC-V: Kconfig: Select deferred GSI probe for ACPI systems Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 08/20] ACPI: scan: Refactor dependency creation Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 09/20] drivers/acpi/scan.c: Update _DEP honor list Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 10/20] RISC-V: ACPI: Initialize GSI mapping structures Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 11/20] ACPI: scan.c: Define weak function to populate dependencies Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 12/20] RISC-V: ACPI: Implement function to add implicit dependencies Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 13/20] ACPI/PNP: Initialize PNP devices skipped due to _DEP Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 14/20] irqchip: riscv-intc: Add ACPI support for AIA Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 15/20] irqchip: riscv-imsic: Add ACPI support Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 16/20] irqchip: riscv-aplic: " Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 17/20] irqchip: irq-sifive-plic: " Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 18/20] ACPI: bus: Add RINTC IRQ model for RISC-V Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 19/20] irqchip: riscv-intc: Set ACPI irqmodel Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 20/20] ACPI: pci_link: Clear the dependencies after probe Sunil V L
2024-04-18 13:49 ` [RFC PATCH v4 00/20] RISC-V: ACPI: Add external interrupt controller support Björn Töpel
2024-04-18 13:58 ` Sunil V L
2024-04-18 14:20 ` Heinrich Schuchardt
2024-04-22 19:28 ` Rafael J. Wysocki
2024-04-24 17:55 ` Björn Töpel
2024-04-29 6:41 ` Sunil V L
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