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[99.254.121.117]) by smtp.gmail.com with ESMTPSA id ic10-20020a05622a68ca00b00436510ddc5esm6014392qtb.34.2024.04.24.04.57.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Apr 2024 04:57:36 -0700 (PDT) Date: Wed, 24 Apr 2024 07:57:34 -0400 From: Peter Xu To: Ryan Roberts Cc: Catalin Marinas , Will Deacon , Joey Gouly , Ard Biesheuvel , Mark Rutland , Anshuman Khandual , David Hildenbrand , Mike Rapoport , Shivansh Vij , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v1 2/2] arm64/mm: Add uffd write-protect support Message-ID: References: <20240424111017.3160195-1-ryan.roberts@arm.com> <20240424111017.3160195-3-ryan.roberts@arm.com> MIME-Version: 1.0 In-Reply-To: <20240424111017.3160195-3-ryan.roberts@arm.com> X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240424_045742_530677_CA6B113B X-CRM114-Status: GOOD ( 25.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Ryan, On Wed, Apr 24, 2024 at 12:10:17PM +0100, Ryan Roberts wrote: > Let's use the newly-free PTE SW bit (58) to add support for uffd-wp. > > The standard handlers are implemented for set/test/clear for both pte > and pmd. Additionally we must also track the uffd-wp state as a pte swp > bit, so use a free swap entry pte bit (3). > > Signed-off-by: Ryan Roberts Looks all sane here from userfault perspective, just one comment below. > --- > arch/arm64/Kconfig | 1 + > arch/arm64/include/asm/pgtable-prot.h | 8 ++++ > arch/arm64/include/asm/pgtable.h | 55 +++++++++++++++++++++++++++ > 3 files changed, 64 insertions(+) > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > index 7b11c98b3e84..763e221f2169 100644 > --- a/arch/arm64/Kconfig > +++ b/arch/arm64/Kconfig > @@ -255,6 +255,7 @@ config ARM64 > select SYSCTL_EXCEPTION_TRACE > select THREAD_INFO_IN_TASK > select HAVE_ARCH_USERFAULTFD_MINOR if USERFAULTFD > + select HAVE_ARCH_USERFAULTFD_WP if USERFAULTFD > select TRACE_IRQFLAGS_SUPPORT > select TRACE_IRQFLAGS_NMI_SUPPORT > select HAVE_SOFTIRQ_ON_OWN_STACK > diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h > index ef952d69fd04..f1e1f6306e03 100644 > --- a/arch/arm64/include/asm/pgtable-prot.h > +++ b/arch/arm64/include/asm/pgtable-prot.h > @@ -20,6 +20,14 @@ > #define PTE_DEVMAP (_AT(pteval_t, 1) << 57) > #define PTE_PROT_NONE (PTE_UXN) /* Reuse PTE_UXN; only when !PTE_VALID */ > > +#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP > +#define PTE_UFFD_WP (_AT(pteval_t, 1) << 58) /* uffd-wp tracking */ > +#define PTE_SWP_UFFD_WP (_AT(pteval_t, 1) << 3) /* only for swp ptes */ > +#else > +#define PTE_UFFD_WP (_AT(pteval_t, 0)) > +#define PTE_SWP_UFFD_WP (_AT(pteval_t, 0)) > +#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ > + > /* > * This bit indicates that the entry is present i.e. pmd_page() > * still points to a valid huge page in memory even if the pmd > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h > index 23aabff4fa6f..3f4748741fdb 100644 > --- a/arch/arm64/include/asm/pgtable.h > +++ b/arch/arm64/include/asm/pgtable.h > @@ -271,6 +271,34 @@ static inline pte_t pte_mkdevmap(pte_t pte) > return set_pte_bit(pte, __pgprot(PTE_DEVMAP | PTE_SPECIAL)); > } > > +#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP > +static inline int pte_uffd_wp(pte_t pte) > +{ > + bool wp = !!(pte_val(pte) & PTE_UFFD_WP); > + > +#ifdef CONFIG_DEBUG_VM > + /* > + * Having write bit for wr-protect-marked present ptes is fatal, because > + * it means the uffd-wp bit will be ignored and write will just go > + * through. See comment in x86 implementation. > + */ > + WARN_ON_ONCE(wp && pte_write(pte)); > +#endif Feel free to drop this line, see: https://lore.kernel.org/r/20240417212549.2766883-1-peterx@redhat.com It's still in mm-unstable only. AFAICT ARM64 also is supported by check_page_table, I also checked ARM's ptep_modify_prot_commit() which uses set_pte_at(), so it should cover everything in a superior way already. With that dropped, feel free to add: Acked-by: Peter Xu Thanks, -- Peter Xu _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel