From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 53424C4345F for ; Wed, 24 Apr 2024 16:44:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ULu9+H+JghWAmqepIaBMAmvlRG820+R1pJZvwSPO1Eo=; b=WtBNmOy44isEDy LNuDLxIuX6FzgUam1Hw4uj1soB+nopeyiJycsosneh0oUHNbtlwPphLRyvRKGc/xlojXXKipEaj7d FKjhgOqJz9FsfXU5SC3XQmvxrN7RNUbsMWjcs6GY4ge0JK/IQ2AyWEgHyQeZB7lx2kxYRINYAr6J0 zSoUNqoKgipd9haadvDJCyZXWBkP2qDyvn1wl8mmbSsEc/WbpuYMUgc5odOhGbrpzSw2kIPJl72Ga potqF1uVtUKefKAz3zfakUjf5DmFa+nHAtP3RatO3BZhEsj2yauzaJLtklLRYZesXPdn0iyVeD/Zk //+n4ROPjkEm/wSK2wqA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rzfj7-000000050CH-3avM; Wed, 24 Apr 2024 16:44:09 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rzfj3-000000050BX-2zlB for linux-arm-kernel@lists.infradead.org; Wed, 24 Apr 2024 16:44:08 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id C2697CE1799; Wed, 24 Apr 2024 16:44:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7F013C113CD; Wed, 24 Apr 2024 16:44:00 +0000 (UTC) Date: Wed, 24 Apr 2024 17:43:58 +0100 From: Catalin Marinas To: Ryan Roberts Cc: Will Deacon , Joey Gouly , Ard Biesheuvel , Mark Rutland , Anshuman Khandual , David Hildenbrand , Peter Xu , Mike Rapoport , Shivansh Vij , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v1 1/2] arm64/mm: Move PTE_PROT_NONE and PMD_PRESENT_INVALID Message-ID: References: <20240424111017.3160195-1-ryan.roberts@arm.com> <20240424111017.3160195-2-ryan.roberts@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240424111017.3160195-2-ryan.roberts@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240424_094406_779292_F3230988 X-CRM114-Status: GOOD ( 20.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Apr 24, 2024 at 12:10:16PM +0100, Ryan Roberts wrote: > Previously PTE_PROT_NONE was occupying bit 58, one of the bits reserved > for SW use when the PTE is valid. This is a waste of those precious SW > bits since PTE_PROT_NONE can only ever be set when valid is clear. > Instead let's overlay it on what would be a HW bit if valid was set. > > We need to be careful about which HW bit to choose since some of them > must be preserved; when pte_present() is true (as it is for a > PTE_PROT_NONE pte), it is legitimate for the core to call various > accessors, e.g. pte_dirty(), pte_write() etc. There are also some > accessors that are private to the arch which must continue to be > honoured, e.g. pte_user(), pte_user_exec() etc. > > So we choose to overlay PTE_UXN; This effectively means that whenever a > pte has PTE_PROT_NONE set, it will always report pte_user_exec() == > false, which is obviously always correct. > > As a result of this change, we must shuffle the layout of the > arch-specific swap pte so that PTE_PROT_NONE is always zero and not > overlapping with any other field. As a result of this, there is no way > to keep the `type` field contiguous without conflicting with > PMD_PRESENT_INVALID (bit 59), which must also be 0 for a swap pte. So > let's move PMD_PRESENT_INVALID to bit 60. I think we discussed but forgot the details. What was the reason for not using, say, bit 60 for PTE_PROT_NONE to avoid all the swap bits reshuffling? Clearing or setting of the PTE_PROT_NONE bit is done via pte_modify() and this gets all the new permission bits anyway. With POE support (on the list for now), PTE_PROT_NONE would overlap with POIndex[0] but I don't think we ever plan to read this field (other than maybe ptdump). The POIndex field is set from the vma->vm_page_prot (Joey may need to adjust vm_get_page_prot() in his patches to avoid setting a pkey on a PROT_NONE mapping). -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel