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[79.19.230.33]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a5a8883344bsm289752066b.9.2024.05.16.01.36.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 May 2024 01:36:18 -0700 (PDT) From: Andrea della Porta X-Google-Original-From: Andrea della Porta Date: Thu, 16 May 2024 10:36:27 +0200 To: Florian Fainelli Cc: Andrea della Porta , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ray Jui , Scott Branden , Broadcom internal kernel review list , Ulf Hansson , Adrian Hunter , Kamal Dasu , Al Cooper , Eric Anholt , Stefan Wahren , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Subject: Re: [PATCH v2 4/4] arm64: dts: broadcom: Add support for BCM2712 Message-ID: Mail-Followup-To: Florian Fainelli , Andrea della Porta , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ray Jui , Scott Branden , Broadcom internal kernel review list , Ulf Hansson , Adrian Hunter , Kamal Dasu , Al Cooper , Eric Anholt , Stefan Wahren , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org References: <59a3015c3a6f2f0b70a38c030274a163773e7757.1715332922.git.andrea.porta@suse.com> <786bbf35-e9fe-445c-b6f9-21119e60fb34@broadcom.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <786bbf35-e9fe-445c-b6f9-21119e60fb34@broadcom.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240516_013621_579399_F44B718D X-CRM114-Status: GOOD ( 19.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 09:14 Fri 10 May , Florian Fainelli wrote: > On 5/10/24 07:35, Andrea della Porta wrote: > > This should be #size-cells = <2> to be future proof and support over 4GB of > DRAM, because the DDR controller and the memory map on that chip have been > designed with that requirement. > > > + > > + interrupt-parent = <&gicv2>; > > + > > + axi: axi { > > + compatible = "simple-bus"; > > + #address-cells = <2>; > > + #size-cells = <1>; > > + ranges; > > The AXI peripheral window should be defined in the ranges property. The > aperture is from 0x10_0000_0000 to 0x10_3FFF_FFFF. > > From that point on you can define all peripherals under the axi node to be > relative to that axi aperture, just like what you did for the legacy Pi > peripherals in the subsequent bus node. This doesn't seem to match with what I have here: - some axi peripherals goes beyond 0x10_3FFF_FFFF (e.g. the interrupt controller is @0x107fff9000) - downstream dts have that ranges going from 0x10 0x00000000 0x11 0x00000000, so to span all the peripheral (included e.g. the above int controller) - another comment in downstream dts says: // 10_00000000-1x_xxxxxxxx = up to 64GB system RAM I'm a little confused here, of course we could also define multiple ranges but I don't really know what the boundaries are. Anyway, I would opt for the extended range (0x10 0x00000000 - 0x11 0x00000000) unless there is concern about it. Any thoughts? Many thanks, Andrea _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel