From: Frank Li <Frank.li@nxp.com>
To: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc: linus.walleij@linaro.org, sudeep.holla@arm.com,
cristian.marussi@arm.com, robh@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
shawnguo@kernel.org, s.hauer@pengutronix.de,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, festevam@gmail.com,
imx@lists.linux.dev, aisheng.dong@nxp.com,
Peng Fan <peng.fan@nxp.com>
Subject: Re: [RFC] dt-bindings: firmware: arm,scmi: Add properties for i.MX95 Pinctrl OEM extensions
Date: Thu, 16 May 2024 10:40:29 -0400 [thread overview]
Message-ID: <ZkYa3VAsLYkxhWP7@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20240516073012.1699795-1-peng.fan@oss.nxp.com>
On Thu, May 16, 2024 at 03:30:12PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> i.MX95 Pinctrl is managed by System Control Management Interface(SCMI)
> firmware using OEM extensions. No functions, no groups are provided by
> the firmware. So add i.MX95 specific properties.
>
> To keep aligned with current i.MX pinctrl bindings, still use "fsl,pins"
> for i.MX95.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>
> V1:
> There is already a v6 version for i.MX95 pinctrl with binding got reviewed by
> Rob, https://lore.kernel.org/all/20240513-pinctrl-scmi-oem-v3-v6-1-904975c99cc4@nxp.com/
> But after NXP internal discussion, to keep "fsl,pins" for i.MX95 would make
> it aligned with current i.MX93/8M/7 bindings which people are familiar with,
> and easy to understand.
>
> Sorry to bring back so late after your reviewing in previous generic binding
> patch. This is not to reject the v6 patch, just wanna to see whether you are
> happy with "fsl,pins" for i.MX95. If people are happy to accept, I will post
> out driver together with this patch in new patchset to reject v6. If people are
> not happy, we could continue with v6.
>
> v6: https://lore.kernel.org/all/20240513-pinctrl-scmi-oem-v3-v6-0-904975c99cc4@nxp.com/
>
> Thanks,
> Peng
>
> .../bindings/firmware/arm,scmi.yaml | 4 +-
> .../firmware/nxp,imx95-scmi-pinctrl.yaml | 54 +++++++++++++++++++
> 2 files changed, 57 insertions(+), 1 deletion(-)
> create mode 100644 Documentation/devicetree/bindings/firmware/nxp,imx95-scmi-pinctrl.yaml
>
> diff --git a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml
> index 7de2c29606e5..f7a48b1e9f62 100644
> --- a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml
> +++ b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml
> @@ -251,7 +251,9 @@ properties:
> type: object
> allOf:
> - $ref: '#/$defs/protocol-node'
> - - $ref: /schemas/pinctrl/pinctrl.yaml
> + - anyOf:
> + - $ref: /schemas/pinctrl/pinctrl.yaml
> + - $ref: /schemas/firmware/nxp,imx95-scmi-pinctrl.yaml
>
> unevaluatedProperties: false
>
> diff --git a/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi-pinctrl.yaml b/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi-pinctrl.yaml
> new file mode 100644
> index 000000000000..3f28c4a171c7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi-pinctrl.yaml
> @@ -0,0 +1,54 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright 2024 NXP
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/firmware/nxp,imx95-scmi-pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: i.MX System Control and Management Interface (SCMI) Pinctrl Protocol
> +
> +maintainers:
> + - Peng Fan <peng.fan@nxp.com>
> +
> +allOf:
> + - $ref: /schemas/pinctrl/pinctrl.yaml
> +
> +patternProperties:
> + 'grp$':
> + type: object
> + description:
> + Pinctrl node's client devices use subnodes for desired pin configuration.
> + Client device subnodes use below standard properties.
> +
> + unevaluatedProperties: false
> +
> + properties:
> + fsl,pins:
> + description:
> + each entry consists of 6 integers and represents the mux and config
> + setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
> + mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
> + be found in <arch/arm64/boot/dts/freescale/imx95-pinfunc.h>. The last
> + integer CONFIG is the pad setting value like pull-up on this pin. Please
> + refer to i.MX8M Plus Reference Manual for detailed CONFIG settings.
> + $ref: /schemas/types.yaml#/definitions/uint32-matrix
> + items:
> + items:
> + - description: |
needn't "|"
Frank
> + "mux_reg" indicates the offset of mux register.
> + - description: |
> + "conf_reg" indicates the offset of pad configuration register.
> + - description: |
> + "input_reg" indicates the offset of select input register.
> + - description: |
> + "mux_val" indicates the mux value to be applied.
> + - description: |
> + "input_val" indicates the select input value to be applied.
> + - description: |
> + "pad_setting" indicates the pad configuration value to be applied.
> +
> +
> + required:
> + - fsl,pins
> +
> +additionalProperties: true
> --
> 2.37.1
>
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next prev parent reply other threads:[~2024-05-16 14:41 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-16 7:30 [RFC] dt-bindings: firmware: arm,scmi: Add properties for i.MX95 Pinctrl OEM extensions Peng Fan (OSS)
2024-05-16 14:40 ` Frank Li [this message]
2024-05-21 6:16 ` Peng Fan
2024-05-20 19:49 ` Rob Herring
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