From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F3A70C25B76 for ; Wed, 5 Jun 2024 07:14:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Yb2dSyUwaJySJQqgk+DSUtSDVTpaNT7xe7K2tfnRJX0=; b=XaeK60WP/ZbOLk t4eaQ1t9gil081ecOg3N/3+1nUy9hz/OsZaTpKHsC8vv5bjcfjbejirNwZ7EAOzsEEauUsHokGPoC ElxrviSh7WahdmIzgJAjWtlc0Fd8GPRGmvmBth/8s8qp7HyU3/f/+83akt9an7KC1vCnKInuRwr09 G6166smOFKftfVA+IlPBZrNP0uyRvEFX4GwxVvqRxfADeb8E5HtoX6auBasSnESq65R35/xzQQ4gU kuOMYfiT7wzz+me34jIcSL1+Igt30jZN24qe7qXFKC5HXMgSOeVvIWfHEDXti3tTIvjCCarv5pH9f KM8CHlPDNWvvgpS/08gw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sEkqk-00000004woD-0Jk6; Wed, 05 Jun 2024 07:14:22 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sEkqg-00000004wn5-39fq for linux-arm-kernel@lists.infradead.org; Wed, 05 Jun 2024 07:14:20 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 3D68BCE13CD; Wed, 5 Jun 2024 07:14:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DA483C3277B; Wed, 5 Jun 2024 07:14:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1717571655; bh=wUDOuDfSC1HxmhvTFKKgu/XL42Af+d6HJyAA09eVNxU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=oUB1c9gXUTYywqYfJKSzAx5YO4wNPdp2dpNaN0sSw68gZgqh+v86hfGOOvN5mUhql o709wqr0xyx+M5a10ybVVEVX8eQpjsi3ebNfzRZ2OrI3o+5GvCELWuWwPCSJBmqXYL Xq0x5Iq+sGhd0gZqcV8JyVndXe7o6Ozlb9dnS3tVsotIomXGiM9idAR7fq7ptHSQPR 4w1iKicGjcTDxRqE7ztjgZ6L5HzfYdYjI4p4XVIJwck4+YkSA3WYCxCxdeRuqQ/IYj jHtm1hwhmvT+9cFcGBaCgIVVms8wzKLCyC/XHqMn1UgbnI7kxe6uUueN5tvSxIY0ON wwMIKx5AFPXKQ== Date: Wed, 5 Jun 2024 09:14:09 +0200 From: Lorenzo Pieralisi To: linux-kernel@vger.kernel.org, Marc Zyngier , "Rafael J. Wysocki" Cc: Robin Murphy , Mark Rutland , linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, acpica-devel@lists.linux.dev, Fang Xiang , Robert Moore Subject: Re: [PATCH v5 1/1] irqchip/gic-v3: Enable non-coherent redistributors/ITSes ACPI probing Message-ID: References: <20240123110332.112797-1-lpieralisi@kernel.org> <20240123110332.112797-2-lpieralisi@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240605_001419_176397_0B383062 X-CRM114-Status: GOOD ( 33.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Apr 22, 2024 at 10:42:19AM +0200, Lorenzo Pieralisi wrote: > On Tue, Jan 23, 2024 at 12:03:32PM +0100, Lorenzo Pieralisi wrote: > > The GIC architecture specification defines a set of registers for > > redistributors and ITSes that control the sharebility and cacheability > > attributes of redistributors/ITSes initiator ports on the interconnect > > (GICR_[V]PROPBASER, GICR_[V]PENDBASER, GITS_BASER). > > > > Architecturally the GIC provides a means to drive shareability and > > cacheability attributes signals but it is not mandatory for designs to > > wire up the corresponding interconnect signals that control the > > cacheability/shareability of transactions. > > > > Redistributors and ITSes interconnect ports can be connected to > > non-coherent interconnects that are not able to manage the > > shareability/cacheability attributes; this implicitly makes the > > redistributors and ITSes non-coherent observers. > > > > To enable non-coherent GIC designs on ACPI based systems, parse the MADT > > GICC/GICR/ITS subtables non-coherent flags to determine whether the > > respective components are non-coherent observers and force the > > shareability attributes to be programmed into the redistributors and > > ITSes registers. > > > > An ACPI global function (acpi_get_madt_revision()) is added to retrieve > > the MADT revision, in that it is essential to check the MADT revision > > before checking for flags that were added with MADT revision 7 so that > > if the kernel is booted with an ACPI MADT table with revision < 7 it > > skips parsing the newly added flags (that should be zeroed reserved > > values for MADT versions < 7 but they could turn out to be buggy and > > should be ignored). > > > > Signed-off-by: Lorenzo Pieralisi > > Cc: Robin Murphy > > Cc: Mark Rutland > > Cc: "Rafael J. Wysocki" > > Cc: Marc Zyngier > > --- > > drivers/acpi/processor_core.c | 15 +++++++++++++++ > > drivers/irqchip/irq-gic-v3-its.c | 4 ++++ > > drivers/irqchip/irq-gic-v3.c | 9 +++++++++ > > include/linux/acpi.h | 3 +++ > > 4 files changed, 31 insertions(+) > > Hi Marc, Rafael, > > I would kindly ask you please what to do with this patch, it still > applies to v6.9-rc5 - I can resend it if needed, ACPICA changes > are already merged as-per the cover letter. Hi Marc, Rafael, I would kindly ask please what to do with this patch, rebased to v6.10-rc1, I can resend it if that's preferred, please let me know. Thanks, Lorenzo > > diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c > > index b203cfe28550..915713c0e9b7 100644 > > --- a/drivers/acpi/processor_core.c > > +++ b/drivers/acpi/processor_core.c > > @@ -215,6 +215,21 @@ phys_cpuid_t __init acpi_map_madt_entry(u32 acpi_id) > > return rv; > > } > > > > +int __init acpi_get_madt_revision(void) > > +{ > > + struct acpi_table_header *madt = NULL; > > + int revision; > > + > > + if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_MADT, 0, &madt))) > > + return -EINVAL; > > + > > + revision = madt->revision; > > + > > + acpi_put_table(madt); > > + > > + return revision; > > +} > > + > > static phys_cpuid_t map_mat_entry(acpi_handle handle, int type, u32 acpi_id) > > { > > struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; > > diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c > > index fec1b58470df..a60c560ce891 100644 > > --- a/drivers/irqchip/irq-gic-v3-its.c > > +++ b/drivers/irqchip/irq-gic-v3-its.c > > @@ -5591,6 +5591,10 @@ static int __init gic_acpi_parse_madt_its(union acpi_subtable_headers *header, > > goto node_err; > > } > > > > + if (acpi_get_madt_revision() >= 7 && > > + (its_entry->flags & ACPI_MADT_ITS_NON_COHERENT)) > > + its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE; > > + > > err = its_probe_one(its); > > if (!err) > > return 0; > > diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c > > index 98b0329b7154..8cb8dff86c12 100644 > > --- a/drivers/irqchip/irq-gic-v3.c > > +++ b/drivers/irqchip/irq-gic-v3.c > > @@ -2356,6 +2356,11 @@ gic_acpi_parse_madt_redist(union acpi_subtable_headers *header, > > pr_err("Couldn't map GICR region @%llx\n", redist->base_address); > > return -ENOMEM; > > } > > + > > + if (acpi_get_madt_revision() >= 7 && > > + (redist->flags & ACPI_MADT_GICR_NON_COHERENT)) > > + gic_data.rdists.flags |= RDIST_FLAGS_FORCE_NON_SHAREABLE; > > + > > gic_request_region(redist->base_address, redist->length, "GICR"); > > > > gic_acpi_register_redist(redist->base_address, redist_base); > > @@ -2380,6 +2385,10 @@ gic_acpi_parse_madt_gicc(union acpi_subtable_headers *header, > > return -ENOMEM; > > gic_request_region(gicc->gicr_base_address, size, "GICR"); > > > > + if (acpi_get_madt_revision() >= 7 && > > + (gicc->flags & ACPI_MADT_GICC_NON_COHERENT)) > > + gic_data.rdists.flags |= RDIST_FLAGS_FORCE_NON_SHAREABLE; > > + > > gic_acpi_register_redist(gicc->gicr_base_address, redist_base); > > return 0; > > } > > diff --git a/include/linux/acpi.h b/include/linux/acpi.h > > index b7165e52b3c6..4eedab0e51c3 100644 > > --- a/include/linux/acpi.h > > +++ b/include/linux/acpi.h > > @@ -284,6 +284,9 @@ static inline bool invalid_phys_cpuid(phys_cpuid_t phys_id) > > return phys_id == PHYS_CPUID_INVALID; > > } > > > > + > > +int __init acpi_get_madt_revision(void); > > + > > /* Validate the processor object's proc_id */ > > bool acpi_duplicate_processor_id(int proc_id); > > /* Processor _CTS control */ > > -- > > 2.34.1 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel