From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9192EC27C55 for ; Mon, 10 Jun 2024 11:27:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Iss2PMQb+BbLwcxJyTsizB6WztAmK4iu9Xs7HT5g3Tc=; b=lIWvfWHc0GGX03 b2L4WYzgVrZQs4Eto19aEkhsv65/hM3RHOKinbQiyQ360ZJ7pZ61FXQ+PL0xZbZjjiYRHl5jcXMPc SIghDffzhawxD0tXazXzHbWENFvo0NYwrJ6RgiGlS6EI4H8a+xgjcqNx4mOYBNSkzlDojFdqj9LDS IA9U6iU9/voohM2t992E1KfR4h/4Yzcjh6TY7mC+ZGkEJzZlyfc0Iz6Nxe67zeFJdQDJz0vbWJMzk ujX+EzYLPLU4SkYbCTeOq+kxW3gTH4OCQs3tfgdvFQ0/Y1Ckd+tIs1dZlU57Dkh4fN2sUCauKmTN1 i5aRI942Ps+yv59d85Bg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sGdBI-00000004oHV-1lzR; Mon, 10 Jun 2024 11:27:20 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sGdBD-00000004oEq-1hux for linux-arm-kernel@lists.infradead.org; Mon, 10 Jun 2024 11:27:18 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3BFAE12FC; Mon, 10 Jun 2024 04:27:38 -0700 (PDT) Received: from J2N7QTR9R3 (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 61BC63F73B; Mon, 10 Jun 2024 04:27:10 -0700 (PDT) Date: Mon, 10 Jun 2024 12:27:07 +0100 From: Mark Rutland To: "Rob Herring (Arm)" Cc: Russell King , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Will Deacon , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, kvmarm@lists.linux.dev Subject: Re: [PATCH 8/9] KVM: arm64: Refine PMU defines for number of counters Message-ID: References: <20240607-arm-pmu-3-9-icntr-v1-0-c7bd2dceff3b@kernel.org> <20240607-arm-pmu-3-9-icntr-v1-8-c7bd2dceff3b@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240607-arm-pmu-3-9-icntr-v1-8-c7bd2dceff3b@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240610_042716_433396_8E0DB2A5 X-CRM114-Status: GOOD ( 24.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Jun 07, 2024 at 02:31:33PM -0600, Rob Herring (Arm) wrote: > There are 2 defines for the number of PMU counters: > ARMV8_PMU_MAX_COUNTERS and ARMPMU_MAX_HWEVENTS. Both are the same > currently, but Armv9.4/8.9 increases the number of possible counters > from 32 to 33. With this change, the maximum number of counters will > differ for KVM's PMU emulation which is PMUv3.4. Give KVM PMU emulation > its own define to decouple it from the rest of the kernel's number PMU > counters. > > The VHE PMU code needs to match the PMU driver, so switch it to use > ARMPMU_MAX_HWEVENTS instead. > > Signed-off-by: Rob Herring (Arm) Acked-by: Mark Rutland Mark. > --- > arch/arm64/kvm/pmu-emul.c | 8 ++++---- > arch/arm64/kvm/pmu.c | 5 +++-- > include/kvm/arm_pmu.h | 3 ++- > include/linux/perf/arm_pmuv3.h | 2 -- > 4 files changed, 9 insertions(+), 9 deletions(-) > > diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c > index da5ba9d061e8..77fe79b2ba04 100644 > --- a/arch/arm64/kvm/pmu-emul.c > +++ b/arch/arm64/kvm/pmu-emul.c > @@ -234,7 +234,7 @@ void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu) > int i; > struct kvm_pmu *pmu = &vcpu->arch.pmu; > > - for (i = 0; i < ARMV8_PMU_MAX_COUNTERS; i++) > + for (i = 0; i < KVM_ARMV8_PMU_MAX_COUNTERS; i++) > pmu->pmc[i].idx = i; > } > > @@ -261,7 +261,7 @@ void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) > { > int i; > > - for (i = 0; i < ARMV8_PMU_MAX_COUNTERS; i++) > + for (i = 0; i < KVM_ARMV8_PMU_MAX_COUNTERS; i++) > kvm_pmu_release_perf_event(kvm_vcpu_idx_to_pmc(vcpu, i)); > irq_work_sync(&vcpu->arch.pmu.overflow_work); > } > @@ -292,7 +292,7 @@ void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val) > if (!(kvm_vcpu_read_pmcr(vcpu) & ARMV8_PMU_PMCR_E) || !val) > return; > > - for (i = 0; i < ARMV8_PMU_MAX_COUNTERS; i++) { > + for (i = 0; i < KVM_ARMV8_PMU_MAX_COUNTERS; i++) { > struct kvm_pmc *pmc; > > if (!(val & BIT(i))) > @@ -324,7 +324,7 @@ void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val) > if (!kvm_vcpu_has_pmu(vcpu) || !val) > return; > > - for (i = 0; i < ARMV8_PMU_MAX_COUNTERS; i++) { > + for (i = 0; i < KVM_ARMV8_PMU_MAX_COUNTERS; i++) { > struct kvm_pmc *pmc; > > if (!(val & BIT(i))) > diff --git a/arch/arm64/kvm/pmu.c b/arch/arm64/kvm/pmu.c > index 01c9a9efdd1c..7eaf5f7aeae9 100644 > --- a/arch/arm64/kvm/pmu.c > +++ b/arch/arm64/kvm/pmu.c > @@ -5,6 +5,7 @@ > */ > #include > #include > +#include > > #include > > @@ -96,7 +97,7 @@ static void kvm_vcpu_pmu_enable_el0(unsigned long events) > u64 typer; > u32 counter; > > - for_each_set_bit(counter, &events, 32) { > + for_each_set_bit(counter, &events, ARMPMU_MAX_HWEVENTS) { > typer = kvm_vcpu_pmu_read_evtype_direct(counter); > typer &= ~ARMV8_PMU_EXCLUDE_EL0; > kvm_vcpu_pmu_write_evtype_direct(counter, typer); > @@ -111,7 +112,7 @@ static void kvm_vcpu_pmu_disable_el0(unsigned long events) > u64 typer; > u32 counter; > > - for_each_set_bit(counter, &events, 32) { > + for_each_set_bit(counter, &events, ARMPMU_MAX_HWEVENTS) { > typer = kvm_vcpu_pmu_read_evtype_direct(counter); > typer |= ARMV8_PMU_EXCLUDE_EL0; > kvm_vcpu_pmu_write_evtype_direct(counter, typer); > diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h > index 871067fb2616..e08aeec5d936 100644 > --- a/include/kvm/arm_pmu.h > +++ b/include/kvm/arm_pmu.h > @@ -10,6 +10,7 @@ > #include > #include > > +#define KVM_ARMV8_PMU_MAX_COUNTERS 32 > > #if IS_ENABLED(CONFIG_HW_PERF_EVENTS) && IS_ENABLED(CONFIG_KVM) > struct kvm_pmc { > @@ -25,7 +26,7 @@ struct kvm_pmu_events { > struct kvm_pmu { > struct irq_work overflow_work; > struct kvm_pmu_events events; > - struct kvm_pmc pmc[ARMV8_PMU_MAX_COUNTERS]; > + struct kvm_pmc pmc[KVM_ARMV8_PMU_MAX_COUNTERS]; > int irq_num; > bool created; > bool irq_level; > diff --git a/include/linux/perf/arm_pmuv3.h b/include/linux/perf/arm_pmuv3.h > index caa09241ad4f..c902fe64f070 100644 > --- a/include/linux/perf/arm_pmuv3.h > +++ b/include/linux/perf/arm_pmuv3.h > @@ -6,8 +6,6 @@ > #ifndef __PERF_ARM_PMUV3_H > #define __PERF_ARM_PMUV3_H > > -#define ARMV8_PMU_MAX_COUNTERS 32 > - > /* > * Common architectural and microarchitectural event numbers. > */ > > -- > 2.43.0 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel