From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 75DCEC27C75 for ; Wed, 12 Jun 2024 18:42:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=jhRLv68FvVfra/xFdMzNrjCqLKZuIfYdnBOIE/gSwb0=; b=oGJ5WguG+TtfVd57CI0uoyDrFj qEI4UP0/SQEiNk2VEDAPuTIrBOjYABtbKX5CtSsWIfhvLAGsNw3+3ns/IzRE6rGd5JHZkyIWaifhA v7BJZ/mOzea5UfOsRG5aRANfNQ0lXP0uFgipIhblv5HUmvUKwqUQ+Puq3fZXUFhHBbxzds2znaYWK fH5nctjKUhvaGi0tOAiJV0OMfyM9UAoLL6iUVAkafQMPwugjBs54kjvxafDsZl9+18h+3uXSfSS46 OTexc8bXAgfZV52OO9yA6svH4OGlscsdQxPVP5d58DBMeByMo4velq3SBxNRW9oNWAce3/vRBe+uC sdYgwtFQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sHSvW-0000000DnDr-0Dez; Wed, 12 Jun 2024 18:42:30 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sHSvT-0000000DnCW-0gYJ for linux-arm-kernel@lists.infradead.org; Wed, 12 Jun 2024 18:42:28 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DEA461042; Wed, 12 Jun 2024 11:42:50 -0700 (PDT) Received: from J2N7QTR9R3.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AB4BA3F64C; Wed, 12 Jun 2024 11:42:24 -0700 (PDT) Date: Wed, 12 Jun 2024 19:42:22 +0100 From: Mark Rutland To: Linus Torvalds Cc: Peter Anvin , Ingo Molnar , Borislav Petkov , Thomas Gleixner , Rasmus Villemoes , Josh Poimboeuf , Catalin Marinas , Will Deacon , Linux Kernel Mailing List , the arch/x86 maintainers , linux-arm-kernel@lists.infradead.org, linux-arch Subject: Re: [PATCH 4/7 v2] arm64: add 'runtime constant' support Message-ID: References: <20240611172010.287427-1-torvalds@linux-foundation.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240611172010.287427-1-torvalds@linux-foundation.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240612_114227_315147_2BAECBA2 X-CRM114-Status: GOOD ( 15.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jun 11, 2024 at 10:20:10AM -0700, Linus Torvalds wrote: > This implements the runtime constant infrastructure for arm64, allowing > the dcache d_hash() function to be generated using as a constant for > hash table address followed by shift by a constant of the hash index. > > Signed-off-by: Linus Torvalds > --- > v2: updates as per Mark Rutland Sorry, I just realised I got the cache maintenance slightly wrong below. > +static inline void __runtime_fixup_ptr(void *where, unsigned long val) > +{ > + __le32 *p = lm_alias(where); > + __runtime_fixup_16(p, val); > + __runtime_fixup_16(p+1, val >> 16); > + __runtime_fixup_16(p+2, val >> 32); > + __runtime_fixup_16(p+3, val >> 48); > + caches_clean_inval_pou((unsigned long)p, (unsigned long)(p + 4)); > +} We need to do the I$ maintenance on the VA that'll be executed (to handle systems with a VIPT I$), so we'll need to use 'where' rather than 'p', e.g. caches_clean_inval_pou((unsigned long)where, (unsigned long)where + 4 * AARCH64_INSN_SIZE); Note: the D$ and I$ maintenance instruction (DC CVAU and IC IVAU) only require read permissions, so those can be used on the kernel's executable alias even though that's mapped without write permissions. > +/* Immediate value is 6 bits starting at bit #16 */ > +static inline void __runtime_fixup_shift(void *where, unsigned long val) > +{ > + __le32 *p = lm_alias(where); > + u32 insn = le32_to_cpu(*p); > + insn &= 0xffc0ffff; > + insn |= (val & 63) << 16; > + *p = cpu_to_le32(insn); > + caches_clean_inval_pou((unsigned long)p, (unsigned long)(p + 1)); > +} Likewise: caches_clean_inval_pou((unsigned long)where, (unsigned long)where + AARCH64_INSN_SIZE); Mark.