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From: Oliver Upton To: Marc Zyngier Cc: Joey Gouly , kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: Re: [PATCH 1/5] KVM: arm64: Correctly honor the presence of FEAT_TCRX Message-ID: References: <20240625130042.259175-1-maz@kernel.org> <20240625130042.259175-2-maz@kernel.org> <20240625143734.GA1517668@e124191.cambridge.arm.com> <86r0ckj30i.wl-maz@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <86r0ckj30i.wl-maz@kernel.org> X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240626_165541_649640_5392B7C0 X-CRM114-Status: GOOD ( 24.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jun 25, 2024 at 07:22:53PM +0100, Marc Zyngier wrote: > On Tue, 25 Jun 2024 15:37:34 +0100, > Joey Gouly wrote: > > > > On Tue, Jun 25, 2024 at 02:00:37PM +0100, Marc Zyngier wrote: > > > We currently blindly enable TCR2_EL1 use in a guest, irrespective > > > of the feature set. This is obviously wrong, and we should actually > > > honor the guest configuration and handle the possible trap resulting > > > from the guest being buggy. > > > > > > Signed-off-by: Marc Zyngier > > > --- > > > arch/arm64/include/asm/kvm_arm.h | 2 +- > > > arch/arm64/kvm/sys_regs.c | 9 +++++++++ > > > 2 files changed, 10 insertions(+), 1 deletion(-) > > > > > > diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h > > > index b2adc2c6c82a5..e6682a3ace5af 100644 > > > --- a/arch/arm64/include/asm/kvm_arm.h > > > +++ b/arch/arm64/include/asm/kvm_arm.h > > > @@ -102,7 +102,7 @@ > > > #define HCR_HOST_NVHE_PROTECTED_FLAGS (HCR_HOST_NVHE_FLAGS | HCR_TSC) > > > #define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H) > > > > > > -#define HCRX_GUEST_FLAGS (HCRX_EL2_SMPME | HCRX_EL2_TCR2En) > > > +#define HCRX_GUEST_FLAGS (HCRX_EL2_SMPME) > > > #define HCRX_HOST_FLAGS (HCRX_EL2_MSCEn | HCRX_EL2_TCR2En | HCRX_EL2_EnFPM) > > > > > > /* TCR_EL2 Registers bits */ > > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > > > index 22b45a15d0688..71996d36f3751 100644 > > > --- a/arch/arm64/kvm/sys_regs.c > > > +++ b/arch/arm64/kvm/sys_regs.c > > > @@ -383,6 +383,12 @@ static bool access_vm_reg(struct kvm_vcpu *vcpu, > > > bool was_enabled = vcpu_has_cache_enabled(vcpu); > > > u64 val, mask, shift; > > > > > > + if (reg_to_encoding(r) == SYS_TCR2_EL1 && > > > + !kvm_has_feat(vcpu->kvm, ID_AA64MMFR3_EL1, TCRX, IMP)) { > > > + kvm_inject_undefined(vcpu); > > > + return false; > > > + } > > > + > > > > If we need to start doing this with more vm(sa) registers, it might make sense > > to think of a way to do this without putting a big if/else in here. For now > > this is seems fine. > > One possible solution would be to mimic the FGU behaviour and have a > shadow version of HCRX_EL2 that only indicates the trap routing code > that something trapped through that bit needs to UNDEF. Seems reasonable, but that'll be the problem for the _next_ person to add an affected register ;-) -- Thanks, Oliver