From: Catalin Marinas <catalin.marinas@arm.com>
To: Yang Shi <yang@os.amperecomputing.com>
Cc: "Christoph Lameter (Ampere)" <cl@gentwo.org>,
will@kernel.org, anshuman.khandual@arm.com, david@redhat.com,
scott@os.amperecomputing.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [v5 PATCH] arm64: mm: force write fault for atomic RMW instructions
Date: Tue, 9 Jul 2024 19:35:13 +0100 [thread overview]
Message-ID: <Zo2C4eXr5_9kifyO@arm.com> (raw)
In-Reply-To: <35f70ba6-5305-4268-b7ba-81545cacd83f@os.amperecomputing.com>
On Tue, Jul 09, 2024 at 10:56:55AM -0700, Yang Shi wrote:
> On 7/4/24 3:03 AM, Catalin Marinas wrote:
> > I haven't figured out what the +24% case is in there, it seems pretty
> > large.
>
> I think I ran the test much more iterations and I didn't see such outlier
> anymore.
That's good, thanks for confirming.
> > What you haven't benchmarked (I think) is the case where the instruction
> > is in an exec-only mapping. The subsequent instruction read will fault
> > and it adds to the overhead. Currently exec-only mappings are not
> > widespread but I heard some people planning to move in this direction as
> > a default build configuration.
>
> I tested exec-only on QEMU tcg, but I don't have a hardware supported EPAN.
> I don't think performance benchmark on QEMU tcg makes sense since it is
> quite slow, such small overhead is unlikely measurable on it.
Yeah, benchmarking under qemu is pointless. I think you can remove some
of the ARM64_HAS_EPAN checks (or replaced them with ARM64_HAS_PAN) just
for testing. For security reason, we removed this behaviour in commit
24cecc377463 ("arm64: Revert support for execute-only user mappings")
but it's good enough for testing. This should give you PROT_EXEC-only
mappings on your hardware.
--
Catalin
next prev parent reply other threads:[~2024-07-09 18:35 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-26 19:18 [v5 PATCH] arm64: mm: force write fault for atomic RMW instructions Yang Shi
2024-06-28 16:54 ` Catalin Marinas
2024-06-28 16:57 ` Christoph Lameter (Ampere)
2024-06-28 17:24 ` Catalin Marinas
2024-06-28 18:20 ` Yang Shi
2024-07-01 19:43 ` Catalin Marinas
2024-07-02 10:26 ` Ryan Roberts
2024-07-02 11:22 ` David Hildenbrand
2024-07-02 12:36 ` Ryan Roberts
2024-07-02 12:58 ` David Hildenbrand
2024-07-02 13:26 ` Ryan Roberts
2024-07-02 13:50 ` David Hildenbrand
2024-07-02 14:51 ` Ryan Roberts
2024-07-15 13:09 ` Ryan Roberts
2024-07-02 22:21 ` Yang Shi
2024-07-04 10:03 ` Catalin Marinas
2024-07-05 17:05 ` Christoph Lameter (Ampere)
2024-07-05 18:24 ` Catalin Marinas
2024-07-05 18:51 ` Christoph Lameter (Ampere)
2024-07-06 9:47 ` Catalin Marinas
2024-07-09 17:56 ` Yang Shi
2024-07-09 18:35 ` Catalin Marinas [this message]
2024-07-09 22:29 ` Yang Shi
2024-07-10 9:22 ` Catalin Marinas
2024-07-10 18:43 ` Yang Shi
2024-07-11 17:43 ` Catalin Marinas
2024-07-11 18:17 ` Yang Shi
2024-08-13 17:09 ` Yang Shi
2024-08-21 10:18 ` Catalin Marinas
2024-08-21 11:32 ` Dev Jain
2024-08-23 9:59 ` Will Deacon
2024-06-28 18:26 ` Christoph Lameter (Ampere)
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