From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3C19BC3DA45 for ; Wed, 10 Jul 2024 09:23:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To: Content-Transfer-Encoding:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=bLsDuCqRMagtx42FLS/6tKp4qqQd4ENV6wCqiA8ugoc=; b=XMm9dvRZgJg1GBADU6K2c5w+e7 /6GeSZ+UjVzn3dGE7w6DwNw2V0v9jxiGyth0STp46FspJxLA8kaMDQQrGo8QhDSZjeIRibLj6+HWk 8pCrbaAmElUmCodWAFOwoatyQmLCP4gOJhg4VV/IrmR5hdd4GyR51Erl418NwU6pUKyLED6PU0kD2 WjnmVopaPMmiJjm3Z/VUwkkTcP469JxkUcmm5E0SSCCwtAnRh2Hc7dVKCrZA2id9PVdS6uLyG4G3K WUmQI3jqwaHnBrXEbNfrEI9vWGtlUB4BrVA5AL7p/SEVjTXPqZ5AhJVaxyE+n5vx87xT08PumVzCX l6O8B9DA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sRTXG-0000000A3UY-2GU4; Wed, 10 Jul 2024 09:22:50 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sRTWz-0000000A3Px-0ZbF for linux-arm-kernel@lists.infradead.org; Wed, 10 Jul 2024 09:22:34 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 8E62361A1E; Wed, 10 Jul 2024 09:22:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9FB44C32781; Wed, 10 Jul 2024 09:22:30 +0000 (UTC) Date: Wed, 10 Jul 2024 10:22:28 +0100 From: Catalin Marinas To: Yang Shi Cc: "Christoph Lameter (Ampere)" , will@kernel.org, anshuman.khandual@arm.com, david@redhat.com, scott@os.amperecomputing.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [v5 PATCH] arm64: mm: force write fault for atomic RMW instructions Message-ID: References: <773c8be7-eb73-010c-acea-1c2fefd65b84@gentwo.org> <200c5d06-c551-4847-adaf-287750e6aac4@os.amperecomputing.com> <1689cd26-514a-4d72-a1bd-b67357aab3e0@os.amperecomputing.com> <35f70ba6-5305-4268-b7ba-81545cacd83f@os.amperecomputing.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240710_022233_295700_BF6ED1FD X-CRM114-Status: GOOD ( 27.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jul 09, 2024 at 03:29:58PM -0700, Yang Shi wrote: > On 7/9/24 11:35 AM, Catalin Marinas wrote: > > On Tue, Jul 09, 2024 at 10:56:55AM -0700, Yang Shi wrote: > > > On 7/4/24 3:03 AM, Catalin Marinas wrote: > > > I tested exec-only on QEMU tcg, but I don't have a hardware supported EPAN. > > > I don't think performance benchmark on QEMU tcg makes sense since it is > > > quite slow, such small overhead is unlikely measurable on it. > > > > Yeah, benchmarking under qemu is pointless. I think you can remove some > > of the ARM64_HAS_EPAN checks (or replaced them with ARM64_HAS_PAN) just > > for testing. For security reason, we removed this behaviour in commit > > 24cecc377463 ("arm64: Revert support for execute-only user mappings") > > but it's good enough for testing. This should give you PROT_EXEC-only > > mappings on your hardware. > > Thanks for the suggestion. IIUC, I still can emulate exec-only even though > hardware doesn't support EPAN? So it means reading exec-only area in kernel > still can trigger fault, right? Yes, it's been supported since ARMv8.0. We limited it to EPAN only since setting a PROT_EXEC mapping still allowed the kernel to access the memory even if PSTATE.PAN was set. > And 24cecc377463 ("arm64: Revert support for execute-only user mappings") > can't be reverted cleanly by git revert, so I did it manually as below. Yeah, I wasn't expecting that to work. > diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c > index 6a8b71917e3b..0bdedd415e56 100644 > --- a/arch/arm64/mm/fault.c > +++ b/arch/arm64/mm/fault.c > @@ -573,8 +573,8 @@ static int __kprobes do_page_fault(unsigned long far, > unsigned long esr, >                 /* Write implies read */ >                 vm_flags |= VM_WRITE; >                 /* If EPAN is absent then exec implies read */ > -               if (!alternative_has_cap_unlikely(ARM64_HAS_EPAN)) > -                       vm_flags |= VM_EXEC; > +               //if (!alternative_has_cap_unlikely(ARM64_HAS_EPAN)) > +               //      vm_flags |= VM_EXEC; >         } > >         if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) > { > diff --git a/arch/arm64/mm/mmap.c b/arch/arm64/mm/mmap.c > index 642bdf908b22..d30265d424e4 100644 > --- a/arch/arm64/mm/mmap.c > +++ b/arch/arm64/mm/mmap.c > @@ -19,7 +19,7 @@ static pgprot_t protection_map[16] __ro_after_init = { >         [VM_WRITE]                                      = PAGE_READONLY, >         [VM_WRITE | VM_READ]                            = PAGE_READONLY, >         /* PAGE_EXECONLY if Enhanced PAN */ > -       [VM_EXEC]                                       = PAGE_READONLY_EXEC, > +       [VM_EXEC]                                       = PAGE_EXECONLY, >         [VM_EXEC | VM_READ]                             = PAGE_READONLY_EXEC, >         [VM_EXEC | VM_WRITE]                            = PAGE_READONLY_EXEC, >         [VM_EXEC | VM_WRITE | VM_READ]                  = PAGE_READONLY_EXEC, In theory you'd need to change the VM_SHARED | VM_EXEC entry as well. Otherwise it looks fine. -- Catalin