From: Nicolin Chen <nicolinc@nvidia.com>
To: kernel test robot <lkp@intel.com>
Cc: <will@kernel.org>, <llvm@lists.linux.dev>,
<oe-kbuild-all@lists.linux.dev>, <robin.murphy@arm.com>,
<joro@8bytes.org>, <jgg@nvidia.com>, <thierry.reding@gmail.com>,
<vdumpa@nvidia.com>, <jonathanh@nvidia.com>,
<linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>,
<linux-arm-kernel@lists.infradead.org>,
<linux-tegra@vger.kernel.org>
Subject: Re: [PATCH v10 8/9] iommu/arm-smmu-v3: Add in-kernel support for NVIDIA Tegra241 (Grace) CMDQV
Date: Mon, 29 Jul 2024 09:55:31 -0700 [thread overview]
Message-ID: <ZqfJgxMt77WqqeNH@Asurada-Nvidia> (raw)
In-Reply-To: <202407292157.BauV7TPf-lkp@intel.com>
On Mon, Jul 29, 2024 at 10:01:10PM +0800, kernel test robot wrote:
> All warnings (new ones prefixed by >>):
>
> >> drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c:186: warning: Function parameter or struct member 'vintfs' not described in 'tegra241_cmdqv'
> >> drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c:186: warning: Excess struct member 'vtinfs' description in 'tegra241_cmdqv'
>
>
> vim +186 drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
>
> 160
> 161 /**
> 162 * struct tegra241_cmdqv - CMDQ-V for SMMUv3
> 163 * @smmu: SMMUv3 device
> 164 * @base: MMIO base address
> 165 * @irq: IRQ number
> 166 * @num_vintfs: Total number of VINTFs
> 167 * @num_vcmdqs: Total number of VCMDQs
> 168 * @num_lvcmdqs_per_vintf: Number of logical VCMDQs per VINTF
> 169 * @vintf_ids: VINTF id allocator
> 170 * @vtinfs: List of VINTFs
s/vtinfs/vintfs
Will include the typo fix in next ver.
Thanks
Nicolin
> 171 */
> 172 struct tegra241_cmdqv {
> 173 struct arm_smmu_device smmu;
> 174
> 175 void __iomem *base;
> 176 int irq;
> 177
> 178 /* CMDQV Hardware Params */
> 179 u16 num_vintfs;
> 180 u16 num_vcmdqs;
> 181 u16 num_lvcmdqs_per_vintf;
> 182
> 183 struct ida vintf_ids;
> 184
> 185 struct tegra241_vintf **vintfs;
> > 186 };
> 187
>
> --
> 0-DAY CI Kernel Test Service
> https://github.com/intel/lkp-tests/wiki
next prev parent reply other threads:[~2024-07-29 16:56 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-28 22:44 [PATCH v10 0/9] Add Tegra241 (Grace) CMDQV Support (part 1/2) Nicolin Chen
2024-07-28 22:44 ` [PATCH v10 1/9] iommu/arm-smmu-v3: Issue a batch of commands to the same cmdq Nicolin Chen
2024-07-28 22:44 ` [PATCH v10 2/9] iommu/arm-smmu-v3: Enforce arm_smmu_cmdq_build_sync_cmd Nicolin Chen
2024-07-28 22:44 ` [PATCH v10 3/9] iommu/arm-smmu-v3: Pass in cmdq pointer to arm_smmu_cmdq_build_sync_cmd Nicolin Chen
2024-07-28 22:44 ` [PATCH v10 4/9] iommu/arm-smmu-v3: Pass in cmdq pointer to arm_smmu_cmdq_init Nicolin Chen
2024-07-28 22:44 ` [PATCH v10 5/9] iommu/arm-smmu-v3: Make symbols public for CONFIG_TEGRA241_CMDQV Nicolin Chen
2024-07-28 22:44 ` [PATCH v10 6/9] iommu/arm-smmu-v3: Add ARM_SMMU_OPT_SECONDARY_CMDQ_CS_NONE_ONLY Nicolin Chen
2024-07-28 22:44 ` [PATCH v10 7/9] iommu/arm-smmu-v3: Add struct arm_smmu_impl Nicolin Chen
2024-07-28 22:44 ` [PATCH v10 8/9] iommu/arm-smmu-v3: Add in-kernel support for NVIDIA Tegra241 (Grace) CMDQV Nicolin Chen
2024-07-29 14:01 ` kernel test robot
2024-07-29 16:55 ` Nicolin Chen [this message]
2024-07-28 22:44 ` [PATCH v10 9/9] iommu/tegra241-cmdqv: Limit CMDs for guest owned VINTF Nicolin Chen
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