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[104.199.75.203]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-429ed648ea4sm18231855e9.1.2024.08.16.02.49.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 02:49:26 -0700 (PDT) Date: Fri, 16 Aug 2024 09:49:22 +0000 From: Mostafa Saleh To: Jason Gunthorpe Cc: Robin Murphy , linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, will@kernel.org, joro@8bytes.org, jean-philippe@linaro.org, nicolinc@nvidia.com, mshavit@google.com Subject: Re: [PATCH v2] iommu/arm-smmu-v3: Match Stall behaviour for S2 Message-ID: References: <20240814145633.2565126-1-smostafa@google.com> <20240814155151.GB3468552@ziepe.ca> <91d6574d-c67e-484c-ad96-91c9fd3d0c43@arm.com> <20240815125919.GH3468552@ziepe.ca> <43290d6c-004d-423c-822c-7b2558badcee@arm.com> <20240815135951.GM3468552@ziepe.ca> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240815135951.GM3468552@ziepe.ca> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240816_024929_804561_FB13A51E X-CRM114-Status: GOOD ( 24.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Aug 15, 2024 at 10:59:51AM -0300, Jason Gunthorpe wrote: > On Thu, Aug 15, 2024 at 02:41:52PM +0100, Robin Murphy wrote: > > > Unfortunately we can't do that, because there *are* RCiEP devices whose data > > interfaces are native AMBA, and thus for whom stalling is not actually a > > protocol violation as it would be on a real PCIe transport layer; > > correspondingly, it's *because* they are not true PCIe devices that they > > can't support ATS, and thus need stall support in order to do SVA, so things > > should still work out OK in practice. > > I wondered if that would be the case. > > Looks like if we want to do anything then arm_smmu_ats_supported() > would be the right place. Yes, I guess that might be the place, although the spec seems more relaxed regarding stage-1 stall. Anyway I will drop it from this patch, as Robin mentioned this should only happen with buggy firmware and we can have another patch to harden that if required. Thanks, Mostafa > > > > if (dev_is_pci(dev)) { > > > > > > Though I have no idea how the GPU driver that wants to use this > > > works - it doesn't seem to be intree :\ > > > > It's not a GPU: drivers/crypto/hisilicon/zip/ > > Ohhhh.. so it goes through uacce, I see. > > Jason