[PATCH] arm64: dts: imx95: correct L3Cache cache-sets

Peng Fan (OSS)
2024-08-05T02:57:53Z

From: Peng Fan <peng.fan@nxp.com>

The L3Cache size is 512KB.
Size = Cache Line Size(64) * num sets(512) * Assoc(0x10).

Correct the number of Cache sets.

Fixes: 5e3cbb8e4256 ("arm64: dts: freescale: add i.MX95 basic dtsi")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx95.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 3499d4eb2496..425272aa5a81 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -187,7 +187,7 @@ l3_cache: l3-cache {
compatible = "cache";
cache-size = <524288>;
cache-line-size = <64>;
- cache-sets = <1024>;
+ cache-sets = <512>;
cache-level = <3>;
cache-unified;
};
--
2.37.1