From: Catalin Marinas <catalin.marinas@arm.com>
To: Steven Price <steven.price@arm.com>
Cc: Marc Zyngier <maz@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Will Deacon <will@kernel.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Michael Kelley <mhklinux@outlook.com>
Subject: Re: [PATCH v2 1/2] irqchip/gic-v3-its: Share ITS tables with a non-trusted hypervisor
Date: Thu, 3 Oct 2024 10:41:13 +0100 [thread overview]
Message-ID: <Zv5muTP61TRzPfJ9@arm.com> (raw)
In-Reply-To: <20241002141630.433502-2-steven.price@arm.com>
On Wed, Oct 02, 2024 at 03:16:29PM +0100, Steven Price wrote:
> Within a realm guest the ITS is emulated by the host. This means the
> allocations must have been made available to the host by a call to
> set_memory_decrypted(). Introduce an allocation function which performs
> this extra call.
>
> For the ITT use a custom genpool-based allocator that calls
> set_memory_decrypted() for each page allocated, but then suballocates
> the size needed for each ITT. Note that there is no mechanism
> implemented to return pages from the genpool, but it is unlikely the
> peak number of devices will so much larger than the normal level - so
> this isn't expected to be an issue.
>
> Co-developed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> Tested-by: Will Deacon <will@kernel.org>
> Reviewed-by: Marc Zyngier <maz@kernel.org>
> Signed-off-by: Steven Price <steven.price@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
next prev parent reply other threads:[~2024-10-03 9:42 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-02 14:16 [PATCH v2 0/2] irqchip/gic-v3-its: Mark ITS tables as decrypted Steven Price
2024-10-02 14:16 ` [PATCH v2 1/2] irqchip/gic-v3-its: Share ITS tables with a non-trusted hypervisor Steven Price
2024-10-03 9:41 ` Catalin Marinas [this message]
2024-10-21 10:47 ` Steven Price
2024-10-02 14:16 ` [PATCH v2 2/2] irqchip/gic-v3-its: Rely on genpool alignment Steven Price
2024-10-03 9:42 ` Catalin Marinas
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