From: Frank Li <Frank.li@nxp.com>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: l.stach@pengutronix.de, kwilczynski@kernel.org,
bhelgaas@google.com, lpieralisi@kernel.org, robh+dt@kernel.org,
conor+dt@kernel.org, shawnguo@kernel.org,
krzysztof.kozlowski+dt@linaro.org, festevam@gmail.com,
s.hauer@pengutronix.de, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
kernel@pengutronix.de, imx@lists.linux.dev
Subject: Re: [PATCH v1 9/9] arm64: dts: imx95: Add ref clock for i.MX95 PCIe
Date: Tue, 24 Sep 2024 12:28:09 -0400 [thread overview]
Message-ID: <ZvLomXcbbiZ+LTP0@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <1727148464-14341-10-git-send-email-hongxing.zhu@nxp.com>
On Tue, Sep 24, 2024 at 11:27:44AM +0800, Richard Zhu wrote:
> Add ref clock for i.MX95 PCIe.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
below nit.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx95.dtsi | 25 ++++++++++++++++++++----
> 1 file changed, 21 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 1bbf9a0468f6..e66be264c2f2 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -221,6 +221,13 @@ core5 {
> };
> };
>
> + clk_dummy: clock-dummy {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + clock-output-names = "clk_dummy";
> + };
> +
> clk_ext1: clock-ext1 {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> @@ -1055,6 +1062,14 @@ smmu: iommu@490d0000 {
> };
> };
>
> + hsio_blk_ctl: syscon@4c0100c0 {
> + compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
> + reg = <0x0 0x4c0100c0 0x0 0x4>;
> + #clock-cells = <1>;
> + power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
> + clocks = <&clk_dummy>;
nit: move clocks above power-domains
> + };
> +
> pcie0: pcie@4c300000 {
> compatible = "fsl,imx95-pcie";
> reg = <0 0x4c300000 0 0x10000>,
> @@ -1082,8 +1097,9 @@ pcie0: pcie@4c300000 {
> clocks = <&scmi_clk IMX95_CLK_HSIO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> + <&hsio_blk_ctl 0>;
> + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
> assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> @@ -1149,8 +1165,9 @@ pcie1: pcie@4c380000 {
> clocks = <&scmi_clk IMX95_CLK_HSIO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> + <&hsio_blk_ctl 0>;
> + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
> assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> --
> 2.37.1
>
prev parent reply other threads:[~2024-09-24 16:32 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-24 3:27 [PATCH v1 0/9] A bunch of changes to refine i.MX PCIe driver Richard Zhu
2024-09-24 3:27 ` [PATCH v1 1/9] dt-bindings: imx6q-pcie: Add ref clock for i.MX95 PCIe Richard Zhu
2024-09-24 10:08 ` Conor Dooley
2024-09-24 15:23 ` Frank Li
2024-09-24 16:04 ` Conor Dooley
2024-09-25 2:31 ` Hongxing Zhu
2024-09-24 3:27 ` [PATCH v1 2/9] PCI: imx6: " Richard Zhu
2024-09-24 15:30 ` Frank Li
2024-09-24 3:27 ` [PATCH v1 3/9] PCI: imx6: Fetch dbi2 and iATU base addesses from DT Richard Zhu
2024-09-24 3:27 ` [PATCH v1 4/9] PCI: imx6: Correct controller_id generation logic for i.MX7D Richard Zhu
2024-09-24 15:31 ` Frank Li
2024-09-24 16:23 ` Frank Li
2024-09-24 3:27 ` [PATCH v1 5/9] PCI: imx6: Make core reset assertion deassertion symmetric Richard Zhu
2024-09-24 16:23 ` Frank Li
2024-09-24 3:27 ` [PATCH v1 6/9] PCI: imx6: Make *_enable_ref_clk() function symmetric Richard Zhu
2024-09-24 16:24 ` Frank Li
2024-09-24 3:27 ` [PATCH v1 7/9] PCI: imx6: Use dwc common suspend resume method Richard Zhu
2024-09-24 3:27 ` [PATCH v1 8/9] PCI: imx6: Add i.MX8MQ i.MX8Q and i.MX95 PCIe PM support Richard Zhu
2024-09-24 16:26 ` Frank Li
2024-09-24 3:27 ` [PATCH v1 9/9] arm64: dts: imx95: Add ref clock for i.MX95 PCIe Richard Zhu
2024-09-24 16:28 ` Frank Li [this message]
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