From: Oliver Upton <oliver.upton@linux.dev>
To: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev,
linux-arm-kernel@lists.infradead.org, maz@kernel.org,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Mark Brown <broonie@kernel.org>
Subject: Re: [PATCH 47/47] KVM: arm64: nv: Add trap forwarding for FEAT_FGT2 described registers
Date: Tue, 1 Oct 2024 07:46:29 -0700 [thread overview]
Message-ID: <ZvwLRWOKpggCvmH4@linux.dev> (raw)
In-Reply-To: <20241001024356.1096072-48-anshuman.khandual@arm.com>
Hi Anshuman,
On Tue, Oct 01, 2024 at 08:13:56AM +0530, Anshuman Khandual wrote:
> +#define check_cntr_accessible(num) \
> +static enum trap_behaviour check_cntr_accessible_##num(struct kvm_vcpu *vcpu) \
> +{ \
> + u64 mdcr_el2 = __vcpu_sys_reg(vcpu, MDCR_EL2); \
> + int cntr = FIELD_GET(MDCR_EL2_HPMN_MASK, mdcr_el2); \
> + \
> + if (num >= cntr) \
> + return BEHAVE_FORWARD_ANY; \
> + return BEHAVE_HANDLE_LOCALLY; \
> +} \
> +
> +check_cntr_accessible(0)
> +check_cntr_accessible(1)
> +check_cntr_accessible(2)
> +check_cntr_accessible(3)
> +check_cntr_accessible(4)
> +check_cntr_accessible(5)
> +check_cntr_accessible(6)
> +check_cntr_accessible(7)
> +check_cntr_accessible(8)
> +check_cntr_accessible(9)
> +check_cntr_accessible(10)
> +check_cntr_accessible(11)
> +check_cntr_accessible(12)
> +check_cntr_accessible(13)
> +check_cntr_accessible(14)
> +check_cntr_accessible(15)
> +check_cntr_accessible(16)
> +check_cntr_accessible(17)
> +check_cntr_accessible(18)
> +check_cntr_accessible(19)
> +check_cntr_accessible(20)
> +check_cntr_accessible(21)
> +check_cntr_accessible(22)
> +check_cntr_accessible(23)
> +check_cntr_accessible(24)
> +check_cntr_accessible(25)
> +check_cntr_accessible(26)
> +check_cntr_accessible(27)
> +check_cntr_accessible(28)
> +check_cntr_accessible(29)
> +check_cntr_accessible(30)
I'd rather we not use templates for this problem. It bloats the kernel text
as well as the trap encoding space.
I have a patch in the nested PMU series that uses a single complex trap
ID to evaluate HPMN, and derives the index from ESR_EL2. I think it
could also be extended to the PMEVCNTSVR<n> range as well.
Also, keep in mind that the HPMN trap is annoying since it affects Host
EL0 in addition to 'guest' ELs.
[*]: https://lore.kernel.org/kvmarm/20240827002235.1753237-9-oliver.upton@linux.dev/
--
Thanks,
Oliver
next prev parent reply other threads:[~2024-10-01 16:01 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-01 2:43 [PATCH 00/47] KVM: arm64: Enable FGU (Fine Grained Undefined) for FEAT_FGT2 registers Anshuman Khandual
2024-10-01 2:43 ` [PATCH 01/47] arm64/sysreg: Update register fields for ID_AA64MMFR0_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 02/47] arm64/sysreg: Update register fields for ID_AA64DFR0_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 03/47] arm64/sysreg: Update register fields for ID_AA64PFR0_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 04/47] arm64/sysreg: Add register fields for ID_AA64DFR2_EL1 Anshuman Khandual
2024-10-02 15:48 ` Mark Brown
2024-10-03 3:48 ` Anshuman Khandual
2024-10-01 2:43 ` [PATCH 05/47] arm64/sysreg: Add register fields for HDFGRTR2_EL2 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 06/47] arm64/sysreg: Add register fields for HDFGWTR2_EL2 Anshuman Khandual
2024-10-02 16:09 ` Mark Brown
2024-10-01 2:43 ` [PATCH 07/47] arm64/sysreg: Add register fields for HFGITR2_EL2 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 08/47] arm64/sysreg: Add register fields for HFGRTR2_EL2 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 09/47] arm64/sysreg: Add register fields for HFGWTR2_EL2 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 10/47] arm64/sysreg: Add register fields for MDSELR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 11/47] arm64/sysreg: Add register fields for PMSIDR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 12/47] arm64/sysreg: Add register fields for TRBIDR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 13/47] arm64/sysreg: Add register fields for TRBMPAM_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 14/47] arm64/sysreg: Add register fields for PMSDSFR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 15/47] arm64/sysreg: Add register fields for SPMDEVAFF_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 16/47] arm64/sysreg: Add register fields for PFAR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 17/47] arm64/sysreg: Add register fields for PMIAR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 18/47] arm64/sysreg: Add register fields for PMECR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 19/47] arm64/sysreg: Add register fields for PMUACR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 20/47] arm64/sysreg: Add register fields for PMCCNTSVR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 21/47] arm64/sysreg: Add register fields for SPMSCR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 22/47] arm64/sysreg: Add register fields for SPMACCESSR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 23/47] arm64/sysreg: Add register fields for PMICNTR_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 24/47] arm64/sysreg: Add register fields for PMICFILTR_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 25/47] arm64/sysreg: Add register fields for SPMCR_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 26/47] arm64/sysreg: Add register fields for SPMOVSCLR_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 27/47] arm64/sysreg: Add register fields for SPMOVSSET_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 28/47] arm64/sysreg: Add register fields for SPMINTENCLR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 29/47] arm64/sysreg: Add register fields for SPMINTENSET_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 30/47] arm64/sysreg: Add register fields for SPMCNTENCLR_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 31/47] arm64/sysreg: Add register fields for SPMCNTENSET_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 32/47] arm64/sysreg: Add register fields for SPMSELR_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 33/47] arm64/sysreg: Add register fields for PMICNTSVR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 34/47] arm64/sysreg: Add register fields for SPMIIDR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 35/47] arm64/sysreg: Add register fields for SPMDEVARCH_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 36/47] arm64/sysreg: Add register fields for SPMCFGR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 37/47] arm64/sysreg: Add register fields for PMSSCR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 38/47] arm64/sysreg: Add register fields for PMZR_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 39/47] arm64/sysreg: Add register fields for SPMCGCR0_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 40/47] arm64/sysreg: Add register fields for SPMCGCR1_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 41/47] arm64/sysreg: Add register fields for MDSTEPOP_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 42/47] arm64/sysreg: Add register fields for ERXGSR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 43/47] arm64/sysreg: Add register fields for SPMACCESSR_EL2 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 44/47] arm64/sysreg: Add remaining debug registers affected by HDFGxTR2_EL2 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 45/47] KVM: arm64: nv: Add FEAT_FGT2 registers access from virtual EL2 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 46/47] KVM: arm64: nv: Add FEAT_FGT2 registers based FGU handling Anshuman Khandual
2024-10-01 2:43 ` [PATCH 47/47] KVM: arm64: nv: Add trap forwarding for FEAT_FGT2 described registers Anshuman Khandual
2024-10-01 14:46 ` Oliver Upton [this message]
2024-10-03 4:16 ` Anshuman Khandual
2024-10-04 5:01 ` Oliver Upton
2024-10-21 4:01 ` Anshuman Khandual
2024-10-02 15:52 ` [PATCH 00/47] KVM: arm64: Enable FGU (Fine Grained Undefined) for FEAT_FGT2 registers Mark Brown
2024-10-03 3:54 ` Anshuman Khandual
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