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[34.143.166.62]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20d1804c28dsm24701145ad.231.2024.10.16.02.06.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Oct 2024 02:06:42 -0700 (PDT) Date: Wed, 16 Oct 2024 09:06:33 +0000 From: Pranjal Shrivastava To: Peng Fan Cc: Nicolin Chen , Robin Murphy , "Peng Fan (OSS)" , Will Deacon , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joy Zou , "linux-arm-kernel@lists.infradead.org" , "iommu@lists.linux.dev" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Jason Gunthorpe Subject: Re: [PATCH RFC 0/2] iommu/arm-smmu-v3: bypass streamid zero on i.MX95 Message-ID: References: <20241015-smmuv3-v1-0-e4b9ed1b5501@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241016_020645_607987_4A1FCD40 X-CRM114-Status: GOOD ( 26.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Oct 16, 2024 at 08:53:20AM +0000, Peng Fan wrote: > > Subject: Re: [PATCH RFC 0/2] iommu/arm-smmu-v3: bypass streamid > > zero on i.MX95 > > > > On Wed, Oct 16, 2024 at 12:56:54AM +0000, Peng Fan wrote: > > > > Subject: Re: [PATCH RFC 0/2] iommu/arm-smmu-v3: bypass > > streamid zero > > > > on i.MX95 > > > > > > > > On 2024-10-15 4:14 am, Peng Fan (OSS) wrote: > > > > > i.MX95 eDMA3 connects to DSU ACP, supporting dma coherent > > > > memory to > > > > > memory operations. However TBU is in the path between eDMA3 > > > > and ACP, > > > > > need to bypass the default SID 0 to make eDMA3 work properly. > > > > > > > > I'm confused, why not just describe that the device owns this > > > > StreamID in the DT the normal way, i.e, "iommus = <&smmu 0>;"? > > > > > > Current SMMU-v3 driver not support streamID sharing, but we have > > > limited streamIDs(i.MX95 max supports 64 SIDs). However the eDMA > > > supports 64 channels, each channel may have a SID, but not > > supported > > > by current smmuv3 driver. > > > > > > We see smmu would degrade the performance in somecases, so we > > wanna to > > > give user an option to bypass SMMU for eDMA. > > > > If it's a system-wise global need, adding "iommu.passthrough=y" > > to the bootargs string should work for all trusted devices. And > > No. not system wide. > > > particular group can be changed to the IDENTITY domain too upon > > cmdline setting, e.g. > > echo identity | sudo tee > > /sys/class/pci_bus/0009\:01/device/iommu_group/type > > This means I still need to put iommus = <&smmu 0> under > the device tree node. > Yes, otherwise the bypassing an unassigned SID isn't something that the community wouldn't prefer as it smashes a hole in security for everyone. Does your hardware have a way all the devices can configure/program SIDs or does the hardware have multiple devices that generate SID 0? If it's programmable, I'd suggest reserving streamID 0 for bypass and let the system work with the other 63. Apart from that, if you can guarantee that the `eDMA3` would always access a fixed region of memory, then maybe use RMRs to install bypass. > Thanks, > Peng. > > > > > Thanks > > Nicolin > Thanks, Pranjal