From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BB231CEF142 for ; Tue, 8 Oct 2024 09:28:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=1a9lowjkwCMX6opkXfn6n+6wUzkD6nE2RciTHCcB/mc=; b=ISGeLAMVss8RBIvLo+9ilZSj4W qX3HmsOAYXMOasFx0PkB3hiFhyA0hpw4HOl+YT0RYhCRaY8MmUSFwU2DwyrmkgObSYh9FNR3fFTXn 6zw43Vy9p35C15bUYLktY6+4MY+Z3lQi3E+H+My6sDyrx6wYJJjvglG8vntXeMFtyR0hAjpw88uK3 5CbD0JayAePx4Zbe9eqND6BAHVhsFzprC069ghbNyriHXXS5iIlR3jE3xZ+301hdFor9ZHNxsC8tN 1wwbCklPar2aqz/wymXEpZVCPqseXL9FHT21eZHDetMgq2sm3hp8nOrFg/4NK9lUhQTlGv4c1h/tj tFtQTWsw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1sy6Vl-00000005Itq-24Xv; Tue, 08 Oct 2024 09:28:09 +0000 Received: from mail-m16.yeah.net ([1.95.21.14]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1sy6TO-00000005IX5-46nU for linux-arm-kernel@lists.infradead.org; Tue, 08 Oct 2024 09:25:44 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yeah.net; s=s110527; h=Date:From:Subject:Message-ID:MIME-Version: Content-Type; bh=1a9lowjkwCMX6opkXfn6n+6wUzkD6nE2RciTHCcB/mc=; b=LDd6sCubDwIe0HYnhOPZsNpsbYBgp/wzmObjqOYpStSDdPhyS/Pe2XiNekt/KA /BsjlUDDk8+ji5eoey3NxVhzPbppiQuR8XYcgIDaDc10v2mfpGa7kKMZGg48e/0+ DHBuWEGk2xNnvDWqL4mj6rU99EYG8gtiv1z3XmKMAY5xQ= Received: from dragon (unknown []) by gzsmtp2 (Coremail) with SMTP id Ms8vCgDXWqGI+gRngDvdAQ--.25114S3; Tue, 08 Oct 2024 17:25:30 +0800 (CST) Date: Tue, 8 Oct 2024 17:25:28 +0800 From: Shawn Guo To: Ciprian Costea Cc: Chester Lin , Matthias Brugger , Ghennadi Procopciuc , Shawn Guo , Sascha Hauer , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Pengutronix Kernel Team , linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, NXP S32 Linux Team Subject: Re: [PATCH v2 0/2] add S32G2/S32G3 uSDHC pinmux Message-ID: References: <20240830113347.4048370-1-ciprianmarian.costea@oss.nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240830113347.4048370-1-ciprianmarian.costea@oss.nxp.com> X-CM-TRANSID: Ms8vCgDXWqGI+gRngDvdAQ--.25114S3 X-Coremail-Antispam: 1Uf129KBjvdXoW7XrWkCw17XF1DCrWrtF47urg_yoW3WrbE9r WfC3WkCryrurWfAr4Fy3Z7Ar92kw1DXry8Arykt3yakryfJrn3GwnI9rykXr4UWFy7WrnI k3WUtFyv93saqjkaLaAFLSUrUUUUjb8apTn2vfkv8UJUUUU8Yxn0WfASr-VFAUDa7-sFnT 9fnUUvcSsGvfC2KfnxnUUI43ZEXa7IU8DUUUUUUUU== X-Originating-IP: [117.62.23.175] X-CM-SenderInfo: pvkd40hjxrjqh1hdxhhqhw/1tbiEgtyZWcErZHzWQAAs7 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241008_022543_355797_6B32AB30 X-CRM114-Status: GOOD ( 10.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Aug 30, 2024 at 02:33:45PM +0300, Ciprian Costea wrote: > From: Ciprian Marian Costea > > This patchset adds 100mhz & 200mhz pinmux support for uSDHC. > Hence, UHS modes would be supported on NXP boards which enable > usage of VCCQ voltage supply @1.8V by default, with no additional > hardware (board) changes required, such as S32G399A-RDB3. > > Changes in V2: > - Added patch for disablement of UHS modes for NXP boards > where VCCQ voltage supply is set to 3.3V by default. > - Fixed S32G2, S32G3 dtb checks warnings related to uSDHC > pinmux renaming. > > Ciprian Marian Costea (2): > arm64: dts: s32g: Add S32G2/S32G3 uSDHC pinmux > arm64: dts: s32g2: Disable support for SD/eMMC UHS mode Applied both, thanks!