From: Niklas Cassel <cassel@kernel.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
shawnguo@kernel.org, l.stach@pengutronix.de,
devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
imx@lists.linux.dev
Subject: Re: [PATCH v5 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu" for i.MX8M PCIe Endpoint
Date: Wed, 9 Oct 2024 17:00:18 +0200 [thread overview]
Message-ID: <ZwaagtTx1ar1CW4V@ryzen.lan> (raw)
In-Reply-To: <1723534943-28499-2-git-send-email-hongxing.zhu@nxp.com>
On Tue, Aug 13, 2024 at 03:42:20PM +0800, Richard Zhu wrote:
> Add reg-name: "dbi2", "atu" for i.MX8M PCIe Endpoint.
>
> For i.MX8M PCIe EP, the dbi2 and atu addresses are pre-defined in the
> driver. This method is not good.
>
> In commit b7d67c6130ee ("PCI: imx6: Add iMX95 Endpoint (EP) support"),
> Frank suggests to fetch the dbi2 and atu from DT directly. This commit is
> preparation to do that for i.MX8M PCIe EP.
>
> These changes wouldn't break driver function. When "dbi2" and "atu"
> properties are present, i.MX PCIe driver would fetch the according base
> addresses from DT directly. If only two reg properties are provided, i.MX
> PCIe driver would fall back to the old method.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
> .../devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml | 13 +++++++++----
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
> index a06f75df8458..84ca12e8b25b 100644
> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
> +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
> @@ -65,12 +65,14 @@ allOf:
> then:
> properties:
> reg:
> - minItems: 2
> - maxItems: 2
> + minItems: 4
> + maxItems: 4
Now it seems like this patch has already been picked up,
but how is this not breaking DT backwards compatibility?
You are here increasing minItems, which means that an older DT
should now fail to validate using the new schema?
I thought that it was only acceptable to add new optional properties
after the DT binding has been accepted.
What am I missing?
If the specific compatible isn't used by any DTS in a released kernel,
then I think that the commit log should have clearly stated so,
and explained that that is the reason why it is okay to break DT backwards
compatibility.
Kind regards,
Niklas
> reg-names:
> items:
> - const: dbi
> - const: addr_space
> + - const: dbi2
> + - const: atu
>
> - if:
> properties:
> @@ -129,8 +131,11 @@ examples:
>
> pcie_ep: pcie-ep@33800000 {
> compatible = "fsl,imx8mp-pcie-ep";
> - reg = <0x33800000 0x000400000>, <0x18000000 0x08000000>;
> - reg-names = "dbi", "addr_space";
> + reg = <0x33800000 0x100000>,
> + <0x18000000 0x8000000>,
> + <0x33900000 0x100000>,
> + <0x33b00000 0x100000>;
> + reg-names = "dbi", "addr_space", "dbi2", "atu";
> clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
> <&clk IMX8MP_CLK_HSIO_AXI>,
> <&clk IMX8MP_CLK_PCIE_ROOT>;
> --
> 2.37.1
>
next prev parent reply other threads:[~2024-10-09 15:02 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-13 7:42 [PATCH v5 0/4] Add dbi2 and atu for i.MX8M PCIe EP Richard Zhu
2024-08-13 7:42 ` [PATCH v5 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu" for i.MX8M PCIe Endpoint Richard Zhu
2024-08-13 8:52 ` Krzysztof Kozlowski
2024-08-13 16:32 ` Rob Herring (Arm)
2024-08-14 1:49 ` Hongxing Zhu
2024-08-31 12:59 ` Shawn Guo
2024-09-02 2:08 ` Hongxing Zhu
2024-09-04 13:38 ` Frank Li
2024-09-06 6:31 ` Krzysztof Wilczyński
2024-10-09 15:00 ` Niklas Cassel [this message]
2024-10-10 2:17 ` Hongxing Zhu
2024-10-10 9:33 ` Niklas Cassel
2024-08-13 7:42 ` [PATCH v5 2/4] arm64: dts: imx8mq: Add dbi2 and atu reg for i.MX8MQ PCIe EP Richard Zhu
2024-08-13 8:54 ` Krzysztof Kozlowski
2024-08-13 8:55 ` Krzysztof Kozlowski
2024-08-13 7:42 ` [PATCH v5 3/4] arm64: dts: imx8mp: Add dbi2 and atu reg for i.MX8MP " Richard Zhu
2024-08-13 7:42 ` [PATCH v5 4/4] arm64: dts: imx8mm: Add dbi2 and atu reg for i.MX8MM " Richard Zhu
2024-08-31 13:02 ` [PATCH v5 0/4] Add dbi2 and atu for i.MX8M " Shawn Guo
2024-09-04 9:38 ` Shawn Guo
2024-09-09 1:43 ` Hongxing Zhu
2024-09-25 3:39 ` Hongxing Zhu
2024-09-25 3:45 ` Hongxing Zhu
2024-09-25 4:03 ` Hongxing Zhu
2024-10-08 8:30 ` Shawn Guo
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZwaagtTx1ar1CW4V@ryzen.lan \
--to=cassel@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=hongxing.zhu@nxp.com \
--cc=imx@lists.linux.dev \
--cc=kernel@pengutronix.de \
--cc=krzk+dt@kernel.org \
--cc=l.stach@pengutronix.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=robh@kernel.org \
--cc=shawnguo@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).