From: Oliver Upton <oliver.upton@linux.dev>
To: Marc Zyngier <maz@kernel.org>
Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org, Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Mark Brown <broonie@kernel.org>
Subject: Re: [PATCH v4 07/36] KVM: arm64: nv: Save/Restore vEL2 sysregs
Date: Wed, 9 Oct 2024 12:55:21 -0700 [thread overview]
Message-ID: <ZwbfqaxYFoThx_mc@linux.dev> (raw)
In-Reply-To: <20241009190019.3222687-8-maz@kernel.org>
On Wed, Oct 09, 2024 at 07:59:50PM +0100, Marc Zyngier wrote:
> +static void __sysreg_restore_vel2_state(struct kvm_vcpu *vcpu)
> +{
> + u64 val;
> +
> + /* These registers are common with EL1 */
> + write_sysreg(__vcpu_sys_reg(vcpu, PAR_EL1), par_el1);
> + write_sysreg(__vcpu_sys_reg(vcpu, TPIDR_EL1), tpidr_el1);
> +
> + write_sysreg(read_cpuid_id(), vpidr_el2);
I don't think we need to restore VPIDR_EL2 here, so long as we do it on
vcpu_put() when leaving a nested VM context. That seems like the right
place to have it, as we could be running a mix of nested and non-nested
VMs and don't ever poke VPIDR_EL2 for non-NV VMs.
> @@ -89,7 +192,29 @@ void __vcpu_load_switch_sysregs(struct kvm_vcpu *vcpu)
> */
> __sysreg32_restore_state(vcpu);
> __sysreg_restore_user_state(guest_ctxt);
> - __sysreg_restore_el1_state(guest_ctxt);
> +
> + if (unlikely(__is_hyp_ctxt(guest_ctxt))) {
> + __sysreg_restore_vel2_state(vcpu);
> + } else {
> + if (vcpu_has_nv(vcpu)) {
> + /*
> + * Only set VPIDR_EL2 for nested VMs, as this is the
> + * only time it changes. We'll restore the MIDR_EL1
> + * view on put.
> + */
Slightly ambiguous what "VPIDR_EL2" this is referring to (hardware reg
v. guest value). Maybe:
/*
* Use the guest hypervisor's VPIDR_EL2 when in a nested
* state. The hardware value of MIDR_EL1 gets restored on
* put.
*/
> + write_sysreg(ctxt_sys_reg(guest_ctxt, VPIDR_EL2), vpidr_el2);
> +
> + /*
> + * As we're restoring a nested guest, set the value
> + * provided by the guest hypervisor.
> + */
> + mpidr = ctxt_sys_reg(guest_ctxt, VMPIDR_EL2);
> + } else {
> + mpidr = ctxt_sys_reg(guest_ctxt, MPIDR_EL1);
> + }
> +
> + __sysreg_restore_el1_state(guest_ctxt, mpidr);
> + }
>
> vcpu_set_flag(vcpu, SYSREGS_ON_CPU);
> }
> @@ -112,12 +237,20 @@ void __vcpu_put_switch_sysregs(struct kvm_vcpu *vcpu)
>
> host_ctxt = host_data_ptr(host_ctxt);
>
> - __sysreg_save_el1_state(guest_ctxt);
> + if (unlikely(__is_hyp_ctxt(guest_ctxt)))
> + __sysreg_save_vel2_state(vcpu);
> + else
> + __sysreg_save_el1_state(guest_ctxt);
> +
> __sysreg_save_user_state(guest_ctxt);
> __sysreg32_save_state(vcpu);
>
> /* Restore host user state */
> __sysreg_restore_user_state(host_ctxt);
>
> + /* If leaving a nesting guest, restore MPIDR_EL1 default view */
typo: MIDR_EL1
> + if (vcpu_has_nv(vcpu))
> + write_sysreg(read_cpuid_id(), vpidr_el2);
> +
> vcpu_clear_flag(vcpu, SYSREGS_ON_CPU);
> }
> --
> 2.39.2
>
--
Thanks,
Oliver
next prev parent reply other threads:[~2024-10-09 21:16 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-09 18:59 [PATCH v4 00/36] KVM: arm64: Add EL2 support to FEAT_S1PIE/S1POE Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 01/36] arm64: Drop SKL0/SKL1 from TCR2_EL2 Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 02/36] arm64: Remove VNCR definition for PIRE0_EL2 Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 03/36] arm64: Add encoding " Marc Zyngier
2024-10-10 10:46 ` Mark Brown
2024-10-09 18:59 ` [PATCH v4 04/36] KVM: arm64: Drop useless struct s2_mmu in __kvm_at_s1e2() Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 05/36] KVM: arm64: nv: Add missing EL2->EL1 mappings in get_el2_to_el1_mapping() Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 06/36] KVM: arm64: nv: Handle CNTHCTL_EL2 specially Marc Zyngier
2024-10-16 9:37 ` Alexandru Elisei
2024-10-16 11:29 ` Marc Zyngier
2024-10-16 13:19 ` Alexandru Elisei
2024-10-16 13:41 ` Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 07/36] KVM: arm64: nv: Save/Restore vEL2 sysregs Marc Zyngier
2024-10-09 19:55 ` Oliver Upton [this message]
2024-10-16 13:12 ` Alexandru Elisei
2024-10-16 13:57 ` Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 08/36] KVM: arm64: Correctly access TCR2_EL1, PIR_EL1, PIRE0_EL1 with VHE Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 09/36] KVM: arm64: Extend masking facility to arbitrary registers Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 10/36] arm64: Define ID_AA64MMFR1_EL1.HAFDBS advertising FEAT_HAFT Marc Zyngier
2024-10-10 16:20 ` Mark Brown
2024-10-09 18:59 ` [PATCH v4 11/36] KVM: arm64: Add TCR2_EL2 to the sysreg arrays Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 12/36] KVM: arm64: Sanitise TCR2_EL2 Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 13/36] KVM: arm64: Add save/restore for TCR2_EL2 Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 14/36] KVM: arm64: Add PIR{,E0}_EL2 to the sysreg arrays Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 15/36] KVM: arm64: Add save/restore for PIR{,E0}_EL2 Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 16/36] KVM: arm64: Handle PIR{,E0}_EL2 traps Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 17/36] KVM: arm64: Sanitise ID_AA64MMFR3_EL1 Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 18/36] KVM: arm64: Add AT fast-path support for S1PIE Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 19/36] KVM: arm64: Split S1 permission evaluation into direct and hierarchical parts Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 20/36] KVM: arm64: Disable hierarchical permissions when S1PIE is enabled Marc Zyngier
2024-10-10 7:33 ` Oliver Upton
2024-10-10 8:04 ` Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 21/36] KVM: arm64: Implement AT S1PIE support Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 22/36] KVM: arm64: Define helper for EL2 registers with custom visibility Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 23/36] KVM: arm64: Hide TCR2_EL1 from userspace when disabled for guests Marc Zyngier
2024-10-10 7:50 ` Oliver Upton
2024-10-09 19:00 ` [PATCH v4 24/36] KVM: arm64: Hide S1PIE registers " Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 25/36] KVM: arm64: Rely on visibility to let PIR*_ELx/TCR2_ELx UNDEF Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 26/36] arm64: Add encoding for POR_EL2 Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 27/36] KVM: arm64: Add a composite EL2 visibility helper Marc Zyngier
2024-10-10 7:52 ` Oliver Upton
2024-10-09 19:00 ` [PATCH v4 28/36] KVM: arm64: Drop bogus CPTR_EL2.E0POE trap routing Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 29/36] KVM: arm64: Subject S1PIE/S1POE registers to HCR_EL2.{TVM,TRVM} Marc Zyngier
2024-10-10 7:53 ` Oliver Upton
2024-10-09 19:00 ` [PATCH v4 30/36] KVM: arm64: Add basic support for POR_EL2 Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 31/36] KVM: arm64: Add save/retore " Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 32/36] KVM: arm64: Add POE save/restore for AT emulation fast-path Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 33/36] KVM: arm64: Disable hierarchical permissions when POE is enabled Marc Zyngier
2024-10-10 8:08 ` Oliver Upton
2024-10-13 14:27 ` Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 34/36] KVM: arm64: Make PAN conditions part of the S1 walk context Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 35/36] KVM: arm64: Handle stage-1 permission overlays Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 36/36] KVM: arm64: Handle WXN attribute Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZwbfqaxYFoThx_mc@linux.dev \
--to=oliver.upton@linux.dev \
--cc=alexandru.elisei@arm.com \
--cc=broonie@kernel.org \
--cc=joey.gouly@arm.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.linux.dev \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=maz@kernel.org \
--cc=suzuki.poulose@arm.com \
--cc=yuzenghui@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).