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From: Mark Rutland <mark.rutland@arm.com>
To: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Jonathan Corbet <corbet@lwn.net>, Marc Zyngier <maz@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Mark Brown <broonie@kernel.org>,
	kvmarm@lists.linux.dev, linux-doc@vger.kernel.org
Subject: Re: [PATCH 2/3] arm64/boot: Enable EL2 requirements for FEAT_Debugv8p9
Date: Mon, 28 Oct 2024 12:35:11 +0000	[thread overview]
Message-ID: <Zx-E_8SFV74s6xN8@J2N7QTR9R3> (raw)
In-Reply-To: <72700154-cbf4-4a0a-b6e2-6f0709dec0ce@arm.com>

On Wed, Oct 23, 2024 at 11:42:37AM +0530, Anshuman Khandual wrote:
> 
> 
> On 10/22/24 21:40, Mark Rutland wrote:
> > On Tue, Oct 01, 2024 at 10:06:01AM +0530, Anshuman Khandual wrote:
> >> Fine grained trap control for MDSELR_EL1 register needs to be configured in
> >> HDFGRTR2_EL2, and HDFGWTR2_EL2 registers when kernel enters at EL1, but EL2
> >> is also present. This adds a new helper __init_el2_fgt2() initializing this
> >> new FEAT_FGT2 based fine grained registers.
> >>
> >> MDCR_EL2.EBWE needs to be enabled for additional (beyond 16) breakpoint and
> >> watchpoint exceptions when kernel enters at EL1, but EL2 is also present.
> >> This updates __init_el2_debug() as required for FEAT_Debugv8p9.
> >>
> >> While here, also update booting.rst with MDCR_EL3 and SCR_EL3 requirements.
> > 
> > [...]
> > 
> >> +  For CPUs with FEAT_Debugv8p9 extension present:
> >> +
> >> +  - If the kernel is entered at EL1 and EL2 is present:
> >> +
> >> +    - HDFGRTR2_EL2.nMDSELR_EL1 (bit 5) must be initialized to 0b1
> >> +    - HDFGWTR2_EL2.nMDSELR_EL1 (bit 5) must be initialized to 0b1
> >> +    - MDCR_EL2.EBWE (bit 43) must be initialized to 0b1
> >> +
> >> +  - If EL3 is present:
> >> +
> >> +    - MDCR_EL3.TDA (bit 9) must be initialized to 0b0
> > 
> > AFAICT we need TDA==0 this regardless of FEAT_Debugv8p9 (and e.g. we need
> 
> That's because MDCR_EL3.TDA=0, enables access to many other debug registers
> beside FEAT_Debugv8p9, which are currently used and hence this MDCR_EL3.TDA
> =0 requirement is a not a new one but rather a missing one instead ?

Yes, that's why I said we need it regardless; it's an existing
requirement that wasn't documented.

> 
> > MDCR_EL3.TPM==0 where FEAT_PMUv3 is implemented), so we should probably
> > check if there's anything else we haven't yet documented in MDCR_EL3.
> 
> Will scan through MDCR_EL3 register and match it with existing documentation
> i.e Documentation/arch/arm64/booting.rst. If there are some missing MDCR_EL3
> fields which should be mentioned, will add them via a separate pre-requisite
> patch ?

Yes please.

Mark.


  reply	other threads:[~2024-10-28 12:44 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-01  4:35 [PATCH 0/3] arm64/hw_breakpoint: Enable FEAT_Debugv8p9 Anshuman Khandual
2024-10-01  4:36 ` [PATCH 1/3] arm64/cpufeature: Add field details for ID_AA64DFR1_EL1 register Anshuman Khandual
2024-10-22 15:56   ` Mark Rutland
2024-10-23  5:48     ` Anshuman Khandual
2024-10-28 12:33       ` Mark Rutland
2024-10-28 13:38         ` Anshuman Khandual
2024-10-01  4:36 ` [PATCH 2/3] arm64/boot: Enable EL2 requirements for FEAT_Debugv8p9 Anshuman Khandual
2024-10-02 23:25   ` kernel test robot
2024-10-02 23:25   ` kernel test robot
2024-10-22 16:10   ` Mark Rutland
2024-10-23  6:12     ` Anshuman Khandual
2024-10-28 12:35       ` Mark Rutland [this message]
2024-10-28 13:43         ` Anshuman Khandual
2024-10-01  4:36 ` [PATCH 3/3] arm64/hw_breakpoint: Enable FEAT_Debugv8p9 Anshuman Khandual
2024-10-02 23:36   ` kernel test robot
2024-10-03  3:40     ` Anshuman Khandual
2024-10-22 15:34   ` Mark Rutland
2024-10-23  7:31     ` Anshuman Khandual
2024-10-28 12:47       ` Mark Rutland
2024-10-29  7:36         ` Anshuman Khandual
2024-10-29 16:20           ` Mark Rutland
2024-10-21  4:09 ` [PATCH 0/3] " Anshuman Khandual

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