Re: [PATCH v2 04/14] dt-bindings: misc: Add device specific bindings for RaspberryPi RP1

Krzysztof Kozlowski
2024-10-08T06:30:05Z

On Mon, Oct 07, 2024 at 02:39:47PM +0200, Andrea della Porta wrote:
> The RP1 is a MFD that exposes its peripherals through PCI BARs. This
> schema is intended as minimal support for the clock generator and
> gpio controller peripherals which are accessible through BAR1.
>
> Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
> ---
> .../devicetree/bindings/misc/pci1de4,1.yaml | 110 ++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 111 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/misc/pci1de4,1.yaml
>
> diff --git a/Documentation/devicetree/bindings/misc/pci1de4,1.yaml b/Documentation/devicetree/bindings/misc/pci1de4,1.yaml
> new file mode 100644
> index 000000000000..3f099b16e672
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/misc/pci1de4,1.yaml
> @@ -0,0 +1,110 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/misc/pci1de4,1.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: RaspberryPi RP1 MFD PCI device
> +
> +maintainers:
> + - Andrea della Porta <andrea.porta@suse.com>
> +
> +description:
> + The RaspberryPi RP1 is a PCI multi function device containing
> + peripherals ranging from Ethernet to USB controller, I2C, SPI
> + and others.
> + The peripherals are accessed by addressing the PCI BAR1 region.
> +
> +allOf:
> + - $ref: /schemas/pci/pci-ep-bus.yaml
> +
> +properties:
> + compatible:
> + additionalItems: true

Why is this true? This is final schema, not a "common" part.

> + maxItems: 3
> + items:
> + - const: pci1de4,1
> +
> +patternProperties:
> + "^pci-ep-bus@[0-2]$":
> + $ref: '#/$defs/bar-bus'
> + description:
> + The bus on which the peripherals are attached, which is addressable
> + through the BAR.
> +
> +unevaluatedProperties: false
> +
> +$defs:
> + bar-bus:
> + $ref: /schemas/pci/pci-ep-bus.yaml#/$defs/pci-ep-bus
> + unevaluatedProperties: false
> +
> + properties:
> + "#interrupt-cells":
> + const: 2
> + description:
> + Specifies respectively the interrupt number and flags as defined
> + in include/dt-bindings/interrupt-controller/irq.h.
> +
> + interrupt-controller: true
> +
> + interrupt-parent:
> + description:
> + Must be the phandle of this 'pci-ep-bus' node. It will trigger
> + PCI interrupts on behalf of peripheral generated interrupts.
> +
> + patternProperties:
> + "^clocks(@[0-9a-f]+)?$":

Why @ is optional? Your device is fixed, not flexible.

Best regards,
Krzysztof