* [PATCH 2/2] arm64: dts: imx8mp: Add support for DH electronics i.MX8M Plus DHCOM PicoITX
2024-09-28 23:48 [PATCH 1/2] dt-bindings: arm: fsl: Document DH electronics i.MX8M Plus DHCOM PicoITX Marek Vasut
@ 2024-09-28 23:48 ` Marek Vasut
2024-09-30 14:54 ` [PATCH 1/2] dt-bindings: arm: fsl: Document " Conor Dooley
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Marek Vasut @ 2024-09-28 23:48 UTC (permalink / raw)
To: linux-arm-kernel
Cc: kernel, Marek Vasut, Alexander Stein, Conor Dooley, Fabio Estevam,
Gregor Herburger, Hiago De Franco, Hugo Villeneuve,
Joao Paulo Goncalves, Krzysztof Kozlowski, Mathieu Othacehe,
Max Merchel, Michael Walle, Peng Fan, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx
Add support for DH electronics i.MX8M Plus DHCOM SoM on PicoITX carrier board.
This system is populated with serial console, EQoS ethernet, eMMC, SD, SPI NOR,
LEDs and USB 3.0 host used in USB 2.0 mode on PicoITX.
Signed-off-by: Marek Vasut <marex@denx.de>
---
Cc: Alexander Stein <alexander.stein@ew.tq-group.com>
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Gregor Herburger <gregor.herburger@ew.tq-group.com>
Cc: Hiago De Franco <hiago.franco@toradex.com>
Cc: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Cc: Joao Paulo Goncalves <joao.goncalves@toradex.com>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Mathieu Othacehe <m.othacehe@gmail.com>
Cc: Max Merchel <Max.Merchel@ew.tq-group.com>
Cc: Michael Walle <mwalle@kernel.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: imx@lists.linux.dev
Cc: linux-arm-kernel@lists.infradead.org
---
arch/arm64/boot/dts/freescale/Makefile | 1 +
.../dts/freescale/imx8mp-dhcom-picoitx.dts | 176 ++++++++++++++++++
2 files changed, 177 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index f6b8041c1e8f7..4e33cb33ba297 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -170,6 +170,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-debix-som-a-bmb-08.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-drc02.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-picoitx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx.dts b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx.dts
new file mode 100644
index 0000000000000..703cf0fb3d2be
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx.dts
@@ -0,0 +1,176 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023-2024 Marek Vasut <marex@denx.de>
+ *
+ * DHCOM iMX8MP variant:
+ * DHCM-iMX8ML8-C160-R204-F1638-SPI16-E-SD-RTC-T-RGB-I-01D2
+ * DHCOM PCB number: 660-200 or newer
+ * PicoITX PCB number: 487-600 or newer
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+#include "imx8mp-dhcom-som.dtsi"
+
+/ {
+ model = "DH electronics i.MX8M Plus DHCOM PicoITX";
+ compatible = "dh,imx8mp-dhcom-picoitx", "dh,imx8mp-dhcom-som",
+ "fsl,imx8mp";
+
+ chosen {
+ stdout-path = &uart1;
+ };
+
+ led {
+ compatible = "gpio-leds";
+
+ led-0 {
+ color = <LED_COLOR_ID_YELLOW>;
+ default-state = "off";
+ function = LED_FUNCTION_INDICATOR;
+ gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; /* GPIO I */
+ pinctrl-0 = <&pinctrl_dhcom_i>;
+ pinctrl-names = "default";
+ };
+ };
+};
+
+&eqos { /* First ethernet */
+ pinctrl-0 = <&pinctrl_eqos_rmii>;
+ phy-handle = <ðphy0f>;
+ phy-mode = "rmii";
+
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
+ <&clk IMX8MP_SYS_PLL2_100M>,
+ <&clk IMX8MP_SYS_PLL2_50M>;
+ assigned-clock-rates = <0>, <100000000>, <50000000>;
+};
+
+ðphy0g { /* Micrel KSZ9131RNXI */
+ status = "disabled";
+};
+
+ðphy0f { /* SMSC LAN8740Ai */
+ status = "okay";
+};
+
+&fec {
+ status = "disabled";
+};
+
+&flexcan1 {
+ status = "okay";
+};
+
+&gpio1 {
+ gpio-line-names =
+ "DHCOM-G", "", "", "",
+ "", "DHCOM-I", "PicoITX-HW0", "PicoITX-HW2",
+ "DHCOM-B", "DHCOM-A", "", "DHCOM-H", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio2 {
+ gpio-line-names =
+ "", "", "", "", "", "", "", "",
+ "", "", "", "PicoITX-HW1", "", "", "", "",
+ "", "", "", "", "DHCOM-INT", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio4 {
+ gpio-line-names =
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "SOM-HW1", "", "", "", "",
+ "", "", "", "PicoITX-Out2", "", "", "", "";
+};
+
+&gpio5 {
+ gpio-line-names =
+ "", "", "PicoITX-In2", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "",
+ "", "", "PicoITX-In1", "PicoITX-Out1",
+ "", "", "", "", "", "", "", "";
+};
+
+/* No HS connector on this SoM variant, so no HDMI, PCIe and only USB HS. */
+&hdmi_blk_ctrl {
+ status = "disabled";
+};
+
+&hdmi_pvi {
+ status = "disabled";
+};
+
+&hdmi_tx {
+ status = "disabled";
+};
+
+&hdmi_tx_phy {
+ status = "disabled";
+};
+
+&irqsteer_hdmi {
+ status = "disabled";
+};
+
+&lcdif3 {
+ status = "disabled";
+};
+
+&pcie_phy {
+ status = "disabled";
+};
+
+&pcie {
+ status = "disabled";
+};
+
+/* No WiFi/BT chipset on this SoM variant. */
+&uart2 {
+ bluetooth {
+ status = "disabled";
+ };
+};
+
+/* USB_OTG port is not routed out on PicoITX. */
+&usb3_0 {
+ status = "disabled";
+};
+
+&usb_dwc3_0 {
+ status = "disabled";
+};
+
+&usb3_1 {
+ fsl,over-current-active-low;
+};
+
+&usb_dwc3_1 {
+ dr_mode = "host";
+ maximum-speed = "high-speed";
+};
+
+/* No WiFi/BT chipset on this SoM variant. */
+&usdhc1 {
+ status = "disabled";
+};
+
+&iomuxc {
+ /*
+ * The following DHCOM GPIOs are used on this board.
+ * Therefore, they have been removed from the list below.
+ * I: yellow led
+ */
+ pinctrl-0 = <&pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c
+ &pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f
+ &pinctrl_dhcom_g &pinctrl_dhcom_h &pinctrl_dhcom_j
+ &pinctrl_dhcom_k &pinctrl_dhcom_l &pinctrl_dhcom_m
+ &pinctrl_dhcom_n &pinctrl_dhcom_o &pinctrl_dhcom_p
+ &pinctrl_dhcom_q &pinctrl_dhcom_r &pinctrl_dhcom_s
+ &pinctrl_dhcom_int>;
+};
--
2.45.2
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH 1/2] dt-bindings: arm: fsl: Document DH electronics i.MX8M Plus DHCOM PicoITX
2024-09-28 23:48 [PATCH 1/2] dt-bindings: arm: fsl: Document DH electronics i.MX8M Plus DHCOM PicoITX Marek Vasut
2024-09-28 23:48 ` [PATCH 2/2] arm64: dts: imx8mp: Add support for " Marek Vasut
2024-09-30 14:54 ` [PATCH 1/2] dt-bindings: arm: fsl: Document " Conor Dooley
@ 2024-10-02 3:50 ` Rob Herring (Arm)
2024-10-02 4:24 ` Marek Vasut
2024-10-18 2:54 ` Shawn Guo
3 siblings, 1 reply; 6+ messages in thread
From: Rob Herring (Arm) @ 2024-10-02 3:50 UTC (permalink / raw)
To: Marek Vasut
Cc: imx, Michael Walle, Conor Dooley, Hugo Villeneuve, devicetree,
Fabio Estevam, Shawn Guo, Alexander Stein, Max Merchel,
Krzysztof Kozlowski, Peng Fan, Pengutronix Kernel Team,
Mathieu Othacehe, Hiago De Franco, kernel, linux-arm-kernel,
Joao Paulo Goncalves, Sascha Hauer, Gregor Herburger
On Sun, 29 Sep 2024 01:48:08 +0200, Marek Vasut wrote:
> Document support for DH electronics i.MX8M Plus DHCOM SoM on PicoITX carrier
> board. This system is populated with serial console, EQoS ethernet, eMMC, SD,
> SPI NOR, LEDs and USB 3.0 host used in USB 2.0 mode on PicoITX.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> ---
> Cc: Alexander Stein <alexander.stein@ew.tq-group.com>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Gregor Herburger <gregor.herburger@ew.tq-group.com>
> Cc: Hiago De Franco <hiago.franco@toradex.com>
> Cc: Hugo Villeneuve <hvilleneuve@dimonoff.com>
> Cc: Joao Paulo Goncalves <joao.goncalves@toradex.com>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Mathieu Othacehe <m.othacehe@gmail.com>
> Cc: Max Merchel <Max.Merchel@ew.tq-group.com>
> Cc: Michael Walle <mwalle@kernel.org>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: imx@lists.linux.dev
> Cc: linux-arm-kernel@lists.infradead.org
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
New warnings running 'make CHECK_DTBS=y freescale/imx8mp-dhcom-picoitx.dtb' for 20240928234949.357893-1-marex@denx.de:
arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx.dtb: pcie-ep@33800000: reg: [[864026624, 4194304], [402653184, 134217728]] is too short
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx.dtb: pcie-ep@33800000: reg-names: ['dbi', 'addr_space'] is too short
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
^ permalink raw reply [flat|nested] 6+ messages in thread