[PATCH v2 2/4] arm64: dts: imx8dxl-evk: Add PCIe support

Frank Li
2024-10-03T18:18:56Z

From: Richard Zhu <hongxing.zhu@nxp.com>

Add PCIe support on i.MX8DXL EVK board.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
chagne from v1 to v1
- supports -> support
- add space before {
---
arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 33 +++++++++++++++++++
1 file changed, 33 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
index 4caaecc192277..6259186cd4d92 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
@@ -182,6 +182,15 @@ mii_select: regulator-4 {
regulator-always-on;
};

+ reg_pcieb: regulator-pcieb {
+ compatible = "regulator-fixed";
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "reg_pcieb";
+ gpio = <&pca6416_1 13 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
bt_sco_codec: audio-codec-bt {
compatible = "linux,bt-sco";
#sound-dai-cells = <1>;
@@ -567,6 +576,12 @@ &flexcan3 {
status = "okay";
};

+&hsio_phy {
+ fsl,hsio-cfg = "pciea-x2-pcieb";
+ fsl,refclk-pad-mode = "output";
+ status = "okay";
+};
+
&cm40_intmux {
status = "disabled";
};
@@ -585,6 +600,16 @@ &lsio_gpio5 {
status = "okay";
};

+&pcieb {
+ phys = <&hsio_phy 0 PHY_TYPE_PCIE 0>;
+ phy-names = "pcie-phy";
+ pinctrl-0 = <&pinctrl_pcieb>;
+ pinctrl-names = "default";
+ reset-gpio = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;
+ vpcie-supply = <&reg_pcieb>;
+ status = "okay";
+};
+
&sai0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai0>;
@@ -868,6 +893,14 @@ IMX8DXL_UART1_CTS_B_ADMA_UART1_CTS_B 0x06000020
>;
};

+ pinctrl_pcieb: pcieagrp {
+ fsl,pins = <
+ IMX8DXL_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x06000021
+ IMX8DXL_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x06000021
+ IMX8DXL_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000021
+ >;
+ };
+
pinctrl_sai0: sai0grp {
fsl,pins = <
IMX8DXL_SPI0_CS0_ADMA_SAI0_RXD 0x06000060
--
2.34.1