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[95.239.0.46]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cb6696b51asm2946644a12.6.2024.10.22.02.16.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Oct 2024 02:16:22 -0700 (PDT) From: Andrea della Porta X-Google-Original-From: Andrea della Porta Date: Tue, 22 Oct 2024 11:16:43 +0200 To: Rob Herring Cc: Andrea della Porta , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Linus Walleij , Catalin Marinas , Will Deacon , Bartosz Golaszewski , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Saravana Kannan , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-gpio@vger.kernel.org, Masahiro Yamada , Stefan Wahren , Herve Codina , Luca Ceresoli , Thomas Petazzoni , Andrew Lunn Subject: Re: [PATCH v2 03/14] dt-bindings: pci: Add common schema for devices accessible through PCI BARs Message-ID: References: <20241010024746.GA978628-robh@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20241010024746.GA978628-robh@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241022_021625_742336_618DD8A1 X-CRM114-Status: GOOD ( 31.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Rob, On 21:47 Wed 09 Oct , Rob Herring wrote: > On Mon, Oct 07, 2024 at 02:39:46PM +0200, Andrea della Porta wrote: > > Common YAML schema for devices that exports internal peripherals through > > PCI BARs. The BARs are exposed as simple-buses through which the > > peripherals can be accessed. > > > > This is not intended to be used as a standalone binding, but should be > > included by device specific bindings. > > > > Signed-off-by: Andrea della Porta > > --- > > .../devicetree/bindings/pci/pci-ep-bus.yaml | 69 +++++++++++++++++++ > > MAINTAINERS | 1 + > > 2 files changed, 70 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/pci/pci-ep-bus.yaml > > > > diff --git a/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml > > new file mode 100644 > > index 000000000000..9d7a784b866a > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml > > @@ -0,0 +1,69 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/pci/pci-ep-bus.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Common properties for PCI MFD endpoints with peripherals addressable from BARs. > > + > > +maintainers: > > + - Andrea della Porta > > + > > +description: > > + Define a generic node representing a PCI endpoint which contains several sub- > > + peripherals. The peripherals can be accessed through one or more BARs. > > + This common schema is intended to be referenced from device tree bindings, and > > + does not represent a device tree binding by itself. > > + > > +properties: > > + "#address-cells": > > + const: 3 > > + > > + "#size-cells": > > + const: 2 > > + > > + ranges: > > + minItems: 1 > > + maxItems: 6 > > + items: > > + maxItems: 8 > > + additionalItems: true > > + items: > > + - maximum: 5 # The BAR number > > + - const: 0 > > + - const: 0 > > + > > +patternProperties: > > + "^pci-ep-bus@[0-5]$": > > + $ref: '#/$defs/pci-ep-bus' > > This should just be: > > additionalProperties: true > > properties: > compatible: > const: simple-bus > > required: > - compatible > > Then the compatible will cause simple-bus.yaml to be applied to this > node. > Ack. > > + description: > > + One node for each BAR used by peripherals contained in the PCI endpoint. > > + Each node represent a bus on which peripherals are connected. > > + This allows for some segmentation, e.g. one peripheral is accessible > > + through BAR0 and another through BAR1, and you don't want the two > > + peripherals to be able to act on the other BAR. Alternatively, when > > + different peripherals need to share BARs, you can define only one node > > + and use 'ranges' property to map all the used BARs. > > + > > +required: > > + - ranges > > + - '#address-cells' > > + - '#size-cells' > > + > > +$defs: > > + pci-ep-bus: > > + type: object > > + additionalProperties: true > > + properties: > > + compatible: > > + const: simple-bus > > + dma-ranges: true > > + ranges: true > > + "#address-cells": true > > + "#size-cells": true > > + required: > > + - compatible > > + - ranges > > + - '#address-cells' > > + - '#size-cells' > > All this should be covered by simple-bus.yaml. Ack. Many thanks, Andrea > > Rob