* [PATCH] arm64: Expose ID_AA64ISAR1_EL1.XS to sanitised feature consumers
@ 2024-10-31 8:35 Marc Zyngier
2024-11-01 15:35 ` Catalin Marinas
2024-11-01 17:36 ` Catalin Marinas
0 siblings, 2 replies; 6+ messages in thread
From: Marc Zyngier @ 2024-10-31 8:35 UTC (permalink / raw)
To: kvmarm, linux-arm-kernel
Cc: Will Deacon, Catalin Marinas, Joey Gouly, Suzuki K Poulose,
Oliver Upton, Zenghui Yu
Despite KVM now being able to deal with XS-tagged TLBIs, we still don't
expose these feature bits to KVM.
Plumb in the feature in ID_AA64ISAR1_EL1.
Fixes: 0feec7769a63 ("KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations")
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kernel/cpufeature.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 718728a85430..db994d1fd97e 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -228,6 +228,7 @@ static const struct arm64_ftr_bits ftr_id_aa64isar0[] = {
};
static const struct arm64_ftr_bits ftr_id_aa64isar1[] = {
+ ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_EL1_XS_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_EL1_I8MM_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_EL1_DGH_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_EL1_BF16_SHIFT, 4, 0),
--
2.43.0
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH] arm64: Expose ID_AA64ISAR1_EL1.XS to sanitised feature consumers
2024-10-31 8:35 [PATCH] arm64: Expose ID_AA64ISAR1_EL1.XS to sanitised feature consumers Marc Zyngier
@ 2024-11-01 15:35 ` Catalin Marinas
2024-11-01 15:47 ` Oliver Upton
2024-11-01 16:12 ` Marc Zyngier
2024-11-01 17:36 ` Catalin Marinas
1 sibling, 2 replies; 6+ messages in thread
From: Catalin Marinas @ 2024-11-01 15:35 UTC (permalink / raw)
To: Marc Zyngier
Cc: kvmarm, linux-arm-kernel, Will Deacon, Joey Gouly,
Suzuki K Poulose, Oliver Upton, Zenghui Yu
On Thu, Oct 31, 2024 at 08:35:19AM +0000, Marc Zyngier wrote:
> Despite KVM now being able to deal with XS-tagged TLBIs, we still don't
> expose these feature bits to KVM.
>
> Plumb in the feature in ID_AA64ISAR1_EL1.
>
> Fixes: 0feec7769a63 ("KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations")
> Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Happy for this to go in as a fix via the kvm tree but let me know if I
should pick it up instead.
--
Catalin
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] arm64: Expose ID_AA64ISAR1_EL1.XS to sanitised feature consumers
2024-11-01 15:35 ` Catalin Marinas
@ 2024-11-01 15:47 ` Oliver Upton
2024-11-01 16:35 ` Catalin Marinas
2024-11-01 16:12 ` Marc Zyngier
1 sibling, 1 reply; 6+ messages in thread
From: Oliver Upton @ 2024-11-01 15:47 UTC (permalink / raw)
To: Catalin Marinas
Cc: Marc Zyngier, kvmarm, linux-arm-kernel, Will Deacon, Joey Gouly,
Suzuki K Poulose, Zenghui Yu
On Fri, Nov 01, 2024 at 03:35:41PM +0000, Catalin Marinas wrote:
> On Thu, Oct 31, 2024 at 08:35:19AM +0000, Marc Zyngier wrote:
> > Despite KVM now being able to deal with XS-tagged TLBIs, we still don't
> > expose these feature bits to KVM.
> >
> > Plumb in the feature in ID_AA64ISAR1_EL1.
> >
> > Fixes: 0feec7769a63 ("KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations")
> > Signed-off-by: Marc Zyngier <maz@kernel.org>
>
> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
>
> Happy for this to go in as a fix via the kvm tree but let me know if I
> should pick it up instead.
Thanks Catalin. I think this can wait for 6.13, would you mind grabbing
it?
If you do:
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
--
Thanks,
Oliver
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] arm64: Expose ID_AA64ISAR1_EL1.XS to sanitised feature consumers
2024-11-01 15:47 ` Oliver Upton
@ 2024-11-01 16:35 ` Catalin Marinas
0 siblings, 0 replies; 6+ messages in thread
From: Catalin Marinas @ 2024-11-01 16:35 UTC (permalink / raw)
To: Oliver Upton
Cc: Marc Zyngier, kvmarm, linux-arm-kernel, Will Deacon, Joey Gouly,
Suzuki K Poulose, Zenghui Yu
On Fri, Nov 01, 2024 at 08:47:48AM -0700, Oliver Upton wrote:
> On Fri, Nov 01, 2024 at 03:35:41PM +0000, Catalin Marinas wrote:
> > On Thu, Oct 31, 2024 at 08:35:19AM +0000, Marc Zyngier wrote:
> > > Despite KVM now being able to deal with XS-tagged TLBIs, we still don't
> > > expose these feature bits to KVM.
> > >
> > > Plumb in the feature in ID_AA64ISAR1_EL1.
> > >
> > > Fixes: 0feec7769a63 ("KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations")
> > > Signed-off-by: Marc Zyngier <maz@kernel.org>
> >
> > Acked-by: Catalin Marinas <catalin.marinas@arm.com>
> >
> > Happy for this to go in as a fix via the kvm tree but let me know if I
> > should pick it up instead.
>
> Thanks Catalin. I think this can wait for 6.13, would you mind grabbing
> it?
>
> If you do:
>
> Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
I'll pick it up. Thanks.
--
Catalin
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] arm64: Expose ID_AA64ISAR1_EL1.XS to sanitised feature consumers
2024-11-01 15:35 ` Catalin Marinas
2024-11-01 15:47 ` Oliver Upton
@ 2024-11-01 16:12 ` Marc Zyngier
1 sibling, 0 replies; 6+ messages in thread
From: Marc Zyngier @ 2024-11-01 16:12 UTC (permalink / raw)
To: Catalin Marinas
Cc: kvmarm, linux-arm-kernel, Will Deacon, Joey Gouly,
Suzuki K Poulose, Oliver Upton, Zenghui Yu
On Fri, 01 Nov 2024 15:35:41 +0000,
Catalin Marinas <catalin.marinas@arm.com> wrote:
>
> On Thu, Oct 31, 2024 at 08:35:19AM +0000, Marc Zyngier wrote:
> > Despite KVM now being able to deal with XS-tagged TLBIs, we still don't
> > expose these feature bits to KVM.
> >
> > Plumb in the feature in ID_AA64ISAR1_EL1.
> >
> > Fixes: 0feec7769a63 ("KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations")
> > Signed-off-by: Marc Zyngier <maz@kernel.org>
>
> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
>
> Happy for this to go in as a fix via the kvm tree but let me know if I
> should pick it up instead.
No need to merge this urgently, nothing goes badly wrong.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] arm64: Expose ID_AA64ISAR1_EL1.XS to sanitised feature consumers
2024-10-31 8:35 [PATCH] arm64: Expose ID_AA64ISAR1_EL1.XS to sanitised feature consumers Marc Zyngier
2024-11-01 15:35 ` Catalin Marinas
@ 2024-11-01 17:36 ` Catalin Marinas
1 sibling, 0 replies; 6+ messages in thread
From: Catalin Marinas @ 2024-11-01 17:36 UTC (permalink / raw)
To: kvmarm, linux-arm-kernel, Marc Zyngier
Cc: Will Deacon, Joey Gouly, Suzuki K Poulose, Oliver Upton,
Zenghui Yu
On Thu, 31 Oct 2024 08:35:19 +0000, Marc Zyngier wrote:
> Despite KVM now being able to deal with XS-tagged TLBIs, we still don't
> expose these feature bits to KVM.
>
> Plumb in the feature in ID_AA64ISAR1_EL1.
>
>
Applied to arm64 (for-next/misc), thanks!
[1/1] arm64: Expose ID_AA64ISAR1_EL1.XS to sanitised feature consumers
https://git.kernel.org/arm64/c/2287a4c1e118
--
Catalin
^ permalink raw reply [flat|nested] 6+ messages in thread
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2024-10-31 8:35 [PATCH] arm64: Expose ID_AA64ISAR1_EL1.XS to sanitised feature consumers Marc Zyngier
2024-11-01 15:35 ` Catalin Marinas
2024-11-01 15:47 ` Oliver Upton
2024-11-01 16:35 ` Catalin Marinas
2024-11-01 16:12 ` Marc Zyngier
2024-11-01 17:36 ` Catalin Marinas
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