[PATCH 1/3] arm64: dts: imx8qxp-mek: replace hardcode 0 with IMX_LPCG_CLK_0

[PATCH 1/3] arm64: dts: imx8qxp-mek: replace hardcode 0 with IMX_LPCG_CLK_0

[Frank Li]

Update clock settings to use the macro IMX_LPCG_CLK_0 instead of the
hardcoded value 0. The first argument of lpcg is indices, not index.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index 2afebe523fa9d..531236d83caa4 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -230,8 +230,8 @@ &esai0 {
 			<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
 			<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
 			<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
-			<&esai0_lpcg 0>;
-	assigned-clock-parents = <&aud_pll_div0_lpcg 0>;
+			<&esai0_lpcg IMX_LPCG_CLK_0>;
+	assigned-clock-parents = <&aud_pll_div0_lpcg IMX_LPCG_CLK_0>;
 	assigned-clock-rates = <0>, <786432000>, <49152000>, <12288000>, <49152000>;
 	pinctrl-0 = <&pinctrl_esai0>;
 	pinctrl-names = "default";
@@ -411,12 +411,12 @@ pca6416: gpio@20 {
 	cs42888: audio-codec@48 {
 		compatible = "cirrus,cs42888";
 		reg = <0x48>;
-		clocks = <&mclkout0_lpcg 0>;
+		clocks = <&mclkout0_lpcg IMX_LPCG_CLK_0>;
 		clock-names = "mclk";
 		assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
 				<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
 				<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
-				<&mclkout0_lpcg 0>;
+				<&mclkout0_lpcg IMX_LPCG_CLK_0>;
 		assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
 		reset-gpios = <&pca9557_b 1 GPIO_ACTIVE_LOW>;
 		VA-supply = <&reg_audio>;
-- 
2.34.1

[PATCH 2/3] arm64: dts: imx8qm-ss-hsio: fix interrupt-map indent under pci* nodes

[Frank Li]

Fix interrupt-map indent under pci* nodes.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Shawn:
	Sorry for that, you can squashed to previous patch if you like.
---
 arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi
index d24d90955c35a..59b6a670462c7 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi
@@ -31,9 +31,9 @@ pciea: pcie@5f000000 {
 		bus-range = <0x00 0xff>;
 		device_type = "pci";
 		interrupt-map = <0 0 0 1 &gic 0 73 4>,
-				 <0 0 0 2 &gic 0 74 4>,
-				 <0 0 0 3 &gic 0 75 4>,
-				 <0 0 0 4 &gic 0 76 4>;
+				<0 0 0 2 &gic 0 74 4>,
+				<0 0 0 3 &gic 0 75 4>,
+				<0 0 0 4 &gic 0 76 4>;
 		interrupt-map-mask = <0 0 0 0x7>;
 		num-lanes = <1>;
 		num-viewport = <4>;
@@ -61,9 +61,9 @@ pcieb: pcie@5f010000 {
 		bus-range = <0x00 0xff>;
 		device_type = "pci";
 		interrupt-map = <0 0 0 1 &gic 0 105 4>,
-				 <0 0 0 2 &gic 0 106 4>,
-				 <0 0 0 3 &gic 0 107 4>,
-				 <0 0 0 4 &gic 0 108 4>;
+				<0 0 0 2 &gic 0 106 4>,
+				<0 0 0 3 &gic 0 107 4>,
+				<0 0 0 4 &gic 0 108 4>;
 		interrupt-map-mask = <0 0 0 0x7>;
 		num-lanes = <1>;
 		num-viewport = <4>;
-- 
2.34.1

[PATCH 3/3] arm64: dts: imx8qm-ss-hsio: fix PCI and SATA clock indices

[Frank Li]

The first argument of lpcg should indices, instead of index. Fix it by
use predefined macro.

Fixes: 9f7053f67c8a ("arm64: dts: imx8-ss-hsio: Add PCIe and SATA support")
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Shanw:
Sorry, I miss check this again. If you like, you can squash to previous
patch
---
 .../arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi
index 59b6a670462c7..b1d0189a17258 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi
@@ -24,9 +24,9 @@ pciea: pcie@5f000000 {
 		interrupt-names = "msi";
 		#address-cells = <3>;
 		#size-cells = <2>;
-		clocks = <&pciea_lpcg 2>,
-			 <&pciea_lpcg 0>,
-			 <&pciea_lpcg 1>;
+		clocks = <&pciea_lpcg IMX_LPCG_CLK_6>,
+			 <&pciea_lpcg IMX_LPCG_CLK_4>,
+			 <&pciea_lpcg IMX_LPCG_CLK_5>;
 		clock-names = "dbi", "mstr", "slv";
 		bus-range = <0x00 0xff>;
 		device_type = "pci";
@@ -54,9 +54,9 @@ pcieb: pcie@5f010000 {
 		interrupt-names = "msi";
 		#address-cells = <3>;
 		#size-cells = <2>;
-		clocks = <&pcieb_lpcg 2>,
-			 <&pcieb_lpcg 0>,
-			 <&pcieb_lpcg 1>;
+		clocks = <&pcieb_lpcg IMX_LPCG_CLK_6>,
+			 <&pcieb_lpcg IMX_LPCG_CLK_4>,
+			 <&pcieb_lpcg IMX_LPCG_CLK_5>;
 		clock-names = "dbi", "mstr", "slv";
 		bus-range = <0x00 0xff>;
 		device_type = "pci";
@@ -76,8 +76,8 @@ sata: sata@5f020000 {
 		compatible = "fsl,imx8qm-ahci";
 		reg = <0x5f020000 0x10000>;
 		interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&sata_lpcg 0>,
-			 <&sata_crr4_lpcg 0>;
+		clocks = <&sata_lpcg IMX_LPCG_CLK_4>,
+			 <&sata_crr4_lpcg IMX_LPCG_CLK_4>;
 		clock-names = "sata", "sata_ref";
 		phy-names = "sata-phy", "cali-phy0", "cali-phy1";
 		power-domains = <&pd IMX_SC_R_SATA_0>;
-- 
2.34.1

Re: [PATCH 1/3] arm64: dts: imx8qxp-mek: replace hardcode 0 with IMX_LPCG_CLK_0

[Shawn Guo]

On Fri, Oct 25, 2024 at 06:08:08PM -0400, Frank Li wrote:
> Update clock settings to use the macro IMX_LPCG_CLK_0 instead of the
> hardcoded value 0. The first argument of lpcg is indices, not index.
> 
> Signed-off-by: Frank Li <Frank.Li@nxp.com>

Applied all, thanks!