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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9eb1813a33sm9246366b.185.2024.11.04.09.46.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Nov 2024 09:46:25 -0800 (PST) Date: Mon, 4 Nov 2024 17:46:22 +0000 From: Quentin Perret To: Sebastian Ene Cc: Marc Zyngier , Oliver Upton , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , Fuad Tabba , Vincent Donnefort , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH 01/18] KVM: arm64: Change the layout of enum pkvm_page_state Message-ID: References: <20241104133204.85208-1-qperret@google.com> <20241104133204.85208-2-qperret@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241104_094628_782410_DDA1A08B X-CRM114-Status: GOOD ( 27.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Seb, On Monday 04 Nov 2024 at 17:31:50 (+0000), Sebastian Ene wrote: > On Mon, Nov 04, 2024 at 01:31:47PM +0000, Quentin Perret wrote: > > Hi Quentin, > > > The 'concrete' (a.k.a non-meta) page states are currently encoded using > > software bits in PTEs. For performance reasons, the abstract > > pkvm_page_state enum uses the same bits to encode these states as that > > makes conversions from and to PTEs easy. > > > > In order to prepare the ground for moving the 'concrete' state storage > > to the hyp vmemmap, re-arrange the enum to use bits 0 and 1 for this > > purpose. > > > > No functional changes intended. > > > > Signed-off-by: Quentin Perret > > --- > > arch/arm64/kvm/hyp/include/nvhe/mem_protect.h | 17 ++++++++++------- > > 1 file changed, 10 insertions(+), 7 deletions(-) > > > > diff --git a/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h b/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h > > index 0972faccc2af..ca3177481b78 100644 > > --- a/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h > > +++ b/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h > > @@ -24,25 +24,28 @@ > > */ > > enum pkvm_page_state { > > PKVM_PAGE_OWNED = 0ULL, > > - PKVM_PAGE_SHARED_OWNED = KVM_PGTABLE_PROT_SW0, > > - PKVM_PAGE_SHARED_BORROWED = KVM_PGTABLE_PROT_SW1, > > - __PKVM_PAGE_RESERVED = KVM_PGTABLE_PROT_SW0 | > > - KVM_PGTABLE_PROT_SW1, > > + PKVM_PAGE_SHARED_OWNED = BIT(0), > > + PKVM_PAGE_SHARED_BORROWED = BIT(1), > > + __PKVM_PAGE_RESERVED = BIT(0) | BIT(1), > > > > /* Meta-states which aren't encoded directly in the PTE's SW bits */ > > - PKVM_NOPAGE, > > + PKVM_NOPAGE = BIT(2), > > }; > > I guess we will still have to keep around the software bit annotation > for sharing MMIO regions from the host. This would not be tracked by the > vmemmap but it will still be in the s2 pagetable. As this is tagged with no > functional changes intended, are we safe because we are not supporting > MMIO sharing currently ? That's right, currently no MMIO sharing is allowed -- see how host_get_page_state() returns PKVM_NOPAGE for non-memory addresses, so we should be good! Sharing/donating devices is absolutely going to be needed eventually, but I hoped we could make that a separate series. And yes, we'll need _some_ data-structure at EL2 to track that, possibly the page-table, but could also be something else similar to how this series moves that away from the pgt for memory. Hopefully that's an orthogonal discussion we can have later :-) Thanks, Quentin